From: Christopher Covington <cov@codeaurora.org>
To: Jiang Liu <liuj97@gmail.com>, Jiang Liu <jiang.liu@huawei.com>
Cc: Steven Rostedt <rostedt@goodmis.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Jiang Liu <jiang.liu@huawei.com>,
Marc Zyngier <marc.zyngier@arm.com>,
Arnd Bergmann <arnd@arndb.de>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 1/7] arm64: introduce basic aarch64 instruction decoding helpers
Date: Wed, 25 Sep 2013 08:58:55 -0400 [thread overview]
Message-ID: <5242DE0F.1080601@codeaurora.org> (raw)
In-Reply-To: <1380105868-31985-2-git-send-email-liuj97@gmail.com>
Hi Jiang,
On 09/25/2013 06:44 AM, Jiang Liu wrote:
[...]
> diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
[...]
> +static int aarch64_insn_cls[] = {
> + AARCH64_INSN_CLS_UNKNOWN, /* 0 0 X X */
> + AARCH64_INSN_CLS_UNKNOWN, /* 0 0 X X */
> + AARCH64_INSN_CLS_UNKNOWN, /* 0 0 X X */
> + AARCH64_INSN_CLS_UNKNOWN, /* 0 0 X X */
> + AARCH64_INSN_CLS_LDST, /* X 1 X 0 */
> + AARCH64_INSN_CLS_DP_REG, /* X 1 0 1 */
> + AARCH64_INSN_CLS_LDST, /* X 1 X 0 */
> + AARCH64_INSN_CLS_DP_FPSIMD, /* 0 1 1 1 */
> + AARCH64_INSN_CLS_DP_IMM, /* 1 0 0 X */
> + AARCH64_INSN_CLS_DP_IMM, /* 1 0 0 X */
> + AARCH64_INSN_CLS_BR_SYS, /* 1 0 1 X */
> + AARCH64_INSN_CLS_BR_SYS, /* 1 0 1 X */
> + AARCH64_INSN_CLS_LDST, /* X 1 X 0 */
> + AARCH64_INSN_CLS_DP_REG, /* X 1 0 1 */
> + AARCH64_INSN_CLS_LDST, /* X 1 X 0 */
> + AARCH64_INSN_CLS_DP_FPSIMD, /* 1 1 1 1 */
> +};
As I read this, I was initially puzzled as to why there are duplicate entries
in the list. Since the data structure doesn't really support don't-cares,
perhaps it would be clearer to use 1's and 0's instead of X's.
[...]
Thanks,
Christopher
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by the Linux Foundation.
next prev parent reply other threads:[~2013-09-25 12:59 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-25 10:44 [PATCH v1 0/7] Optimize jump label implementation on ARM64 Jiang Liu
2013-09-25 10:44 ` [PATCH v1 1/7] arm64: introduce basic aarch64 instruction decoding helpers Jiang Liu
2013-09-25 12:58 ` Christopher Covington [this message]
2013-09-25 15:50 ` Jiang Liu
2013-09-25 10:44 ` [PATCH v1 2/7] arm64: introduce interfaces to hotpatch kernel and module code Jiang Liu
2013-09-25 14:35 ` Steven Rostedt
2013-09-25 14:42 ` Sandeepa Prabhu
2013-09-25 15:16 ` Steven Rostedt
2013-09-26 2:47 ` Sandeepa Prabhu
2013-09-25 14:35 ` Sandeepa Prabhu
2013-09-25 15:54 ` Jiang Liu
2013-09-26 2:51 ` Sandeepa Prabhu
2013-09-27 15:41 ` Jiang Liu
2013-09-28 1:22 ` Sandeepa Prabhu
2013-09-25 10:44 ` [PATCH v1 3/7] arm64: move encode_insn_immediate() from module.c to insn.c Jiang Liu
2013-09-25 10:44 ` [PATCH v1 4/7] arm64: introduce aarch64_insn_gen_{nop|branch_imm}() helper functions Jiang Liu
2013-09-25 10:44 ` [PATCH v1 5/7] arm64, jump label: detect %c support for ARM64 Jiang Liu
2013-09-25 10:44 ` [PATCH v1 6/7] arm64, jump label: optimize jump label implementation Jiang Liu
2013-09-25 10:44 ` [PATCH v1 7/7] jump_label: use defined macros instead of hard-coding for better readability Jiang Liu
2013-09-25 14:53 ` Steven Rostedt
2013-09-25 15:47 ` Jiang Liu
2013-09-25 16:30 ` Steven Rostedt
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