Re: [RFC PATCH] tty: serial: uartlite: Extend time for sending chars through mdm IP

[Michal Simek <monstr@monstr.eu>]

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On 09/30/2013 02:54 PM, Greg Kroah-Hartman wrote:
> On Mon, Sep 30, 2013 at 01:50:35PM +0200, Michal Simek wrote:
>> From: Michal Simek <monstr@monstr.eu>
>>
>> Serial over jtag via mdm is compatible with uartlite driver
>> just need to extend time for reading chars because connection
>> is slow.
>>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>> ---
>>  drivers/tty/serial/uartlite.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c
>> index 5f90ef2..f55c342 100644
>> --- a/drivers/tty/serial/uartlite.c
>> +++ b/drivers/tty/serial/uartlite.c
>> @@ -422,7 +422,7 @@ static void ulite_console_wait_tx(struct uart_port *port)
>>  	u8 val;
>>
>>  	/* Spin waiting for TX fifo to have space available */
>> -	for (i = 0; i < 100000; i++) {
>> +	for (i = 0; i < 10000000; i++) {
>>  		val = uart_in32(ULITE_STATUS, port);
>>  		if ((val & ULITE_STATUS_TXFULL) == 0)
>>  			break;
> 
> Ick, what happens next year when we get a faster cpu?

I will start to celebrate because 150MHz is not enough. :-)

> Please make this a time delay, not a 'loop till we can count to this
> number', so we know exactly what is going on here.

But seriously, I will look at this change and will try to find out
the slowest and the fastest hw to test this.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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