From: Alex Shi <alex.shi@linaro.org>
To: Arjan van de Ven <arjan@linux.intel.com>,
Preeti U Murthy <preeti@linux.vnet.ibm.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>,
Frederic Weisbecker <fweisbec@gmail.com>,
LAK <linux-arm-kernel@lists.infradead.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"len.brown@intel.com" <len.brown@intel.com>,
rafael.j.wysocki@intel.com
Subject: Re: questions of cpuidle
Date: Tue, 10 Dec 2013 23:28:01 +0800 [thread overview]
Message-ID: <52A73301.3030905@linaro.org> (raw)
In-Reply-To: <52A72ADC.6000003@linux.intel.com>
On 12/10/2013 10:53 PM, Arjan van de Ven wrote:
> On 12/9/2013 10:08 PM, Alex Shi wrote:
>> And for monitor/mwait idle method, seems deep c-state cpu need to keep a
>> eye on memory bus. So seems the memory controller in cpu package is
>> impossible to get into sleep, right?
> not the memory bus
> the cache coherency logic ;-)
>
Thanks a lot, Arjan!
But in Intel c7 state, l3 cache also flushed. Are there some other unit
monitor this?
--
Thanks
Alex
prev parent reply other threads:[~2013-12-10 15:28 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-09 13:40 questions of cpuidle Alex Shi
2013-12-09 14:17 ` Daniel Lezcano
2013-12-10 6:33 ` Alex Shi
2013-12-10 7:27 ` Daniel Lezcano
2013-12-10 8:07 ` anish singh
2013-12-10 8:25 ` Daniel Lezcano
2013-12-10 8:44 ` Alex Shi
2013-12-09 15:26 ` Preeti U Murthy
2013-12-10 6:08 ` Alex Shi
2013-12-10 14:53 ` Arjan van de Ven
2013-12-10 15:28 ` Alex Shi [this message]
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