From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752667Ab3LMLCx (ORCPT ); Fri, 13 Dec 2013 06:02:53 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:57839 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752562Ab3LMLCv (ORCPT ); Fri, 13 Dec 2013 06:02:51 -0500 Message-ID: <52AAE928.5040308@ti.com> Date: Fri, 13 Dec 2013 16:32:00 +0530 From: Kishon Vijay Abraham I User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.1.0 MIME-Version: 1.0 To: Matt Porter , Felipe Balbi , Greg Kroah-Hartman , Rob Herring , Pawel Moll , Mark Rutland , Kumar Gala , Ian Campbell , Christian Daudt , Paul Zimmerman CC: Tomasz Figa , Kamil Debski , Kyungmin Park , Russell King , Linux USB List , Linux ARM Kernel List , Linux Kernel Mailing List , Devicetree List , Linaro Patches Subject: Re: [PATCH v5 6/9] usb: gadget: s3c-hsotg: get phy bus width from phy subsystem References: <1386854770-2173-1-git-send-email-mporter@linaro.org> <1386854770-2173-7-git-send-email-mporter@linaro.org> In-Reply-To: <1386854770-2173-7-git-send-email-mporter@linaro.org> Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thursday 12 December 2013 06:56 PM, Matt Porter wrote: > Adds support for querying the phy bus width from the generic phy > subsystem. Configure UTMI bus width in GUSBCFG based on this value. > > Signed-off-by: Matt Porter Acked-by: Kishon Vijay Abraham I > --- > drivers/usb/gadget/s3c-hsotg.c | 14 +++++++++++++- > drivers/usb/gadget/s3c-hsotg.h | 1 + > 2 files changed, 14 insertions(+), 1 deletion(-) > > diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c > index e9683c2..168aaa9 100644 > --- a/drivers/usb/gadget/s3c-hsotg.c > +++ b/drivers/usb/gadget/s3c-hsotg.c > @@ -144,6 +144,7 @@ struct s3c_hsotg_ep { > * @regs: The memory area mapped for accessing registers. > * @irq: The IRQ number we are using > * @supplies: Definition of USB power supplies > + * @phyif: PHY interface width > * @dedicated_fifos: Set if the hardware has dedicated IN-EP fifos. > * @num_of_eps: Number of available EPs (excluding EP0) > * @debug_root: root directrory for debugfs. > @@ -171,6 +172,7 @@ struct s3c_hsotg { > > struct regulator_bulk_data supplies[ARRAY_SIZE(s3c_hsotg_supply_names)]; > > + u32 phyif; > unsigned int dedicated_fifos:1; > unsigned char num_of_eps; > > @@ -2276,7 +2278,7 @@ static void s3c_hsotg_core_init(struct s3c_hsotg *hsotg) > */ > > /* set the PLL on, remove the HNP/SRP and set the PHY */ > - writel(GUSBCFG_PHYIf16 | GUSBCFG_TOutCal(7) | > + writel(hsotg->phyif | GUSBCFG_TOutCal(7) | > (0x5 << 10), hsotg->regs + GUSBCFG); > > s3c_hsotg_init_fifo(hsotg); > @@ -3621,6 +3623,16 @@ static int s3c_hsotg_probe(struct platform_device *pdev) > goto err_supplies; > } > > + /* Set default UTMI width */ > + hsotg->phyif = GUSBCFG_PHYIf16; > + > + /* > + * If using the generic PHY framework, check if the PHY bus > + * width is 8-bit and set the phyif appropriately. > + */ > + if (hsotg->phy && (phy_get_bus_width(phy) == 8)) > + hsotg->phyif = GUSBCFG_PHYIf8; > + > if (hsotg->phy) > phy_init(hsotg->phy); > > diff --git a/drivers/usb/gadget/s3c-hsotg.h b/drivers/usb/gadget/s3c-hsotg.h > index d650b12..85f549f 100644 > --- a/drivers/usb/gadget/s3c-hsotg.h > +++ b/drivers/usb/gadget/s3c-hsotg.h > @@ -55,6 +55,7 @@ > #define GUSBCFG_HNPCap (1 << 9) > #define GUSBCFG_SRPCap (1 << 8) > #define GUSBCFG_PHYIf16 (1 << 3) > +#define GUSBCFG_PHYIf8 (0 << 3) > #define GUSBCFG_TOutCal_MASK (0x7 << 0) > #define GUSBCFG_TOutCal_SHIFT (0) > #define GUSBCFG_TOutCal_LIMIT (0x7) >