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From: Stephen Warren <swarren@wwwdotorg.org>
To: Hiroshi Doyu <hdoyu@nvidia.com>,
	swarren@nvidia.com, will.deacon@arm.com, grant.likely@linaro.org,
	thierry.reding@gmail.com, robherring2@gmail.com, joro@8bytes.org
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	lorenzo.pieralisi@arm.com, linux-kernel@vger.kernel.org,
	iommu@lists.linux-foundation.org, galak@codeaurora.org,
	linux-tegra@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCHv7 10/12] iommu/tegra: smmu: allow duplicate ASID wirte
Date: Mon, 16 Dec 2013 12:19:37 -0700	[thread overview]
Message-ID: <52AF5249.6050802@wwwdotorg.org> (raw)
In-Reply-To: <1386835033-4701-11-git-send-email-hdoyu@nvidia.com>

On 12/12/2013 12:57 AM, Hiroshi Doyu wrote:
> The device, which belongs to the same ASID, can try to enable the same
> ASID as the other swgroup devices. This should be allowed but just
> skip the actual register write. If the write value is different, it
> will return -EINVAL.

I guess this simplifies the body of the code a lot. Given this, I would
revise the code I suggested in response to a previous patch, to
something more like:

		offs = HWGRP_ASID_REG(i);
		val = smmu_read(smmu, offs);
		if (on) {
			if (WARN_ON(val && val != new_val))
				return -ENODEV;
			memcpy(c->hwgrp, map, sizeof(u64));
		} else {
			WARN_ON(val);
		}
		smmu_write(smmu, val, offs);

> +			if (val) {
> +				if (WARN_ON(val != mask))
> +					return -EINVAL;
> +				goto skip;

That means that:

a) No error is returned when the ASIDs don't match. Surely you still
want to return an error?

b) "skip" skips setting up all HWGRP IDs for the device, whereas perhaps
only 1 was shared yet the rest still need to be set up. If you really do
want to ignore the error, then surely you want "continue;" here not
"goto skip;"?

> +			}
...
> +skip:
>  	return 0;


  reply	other threads:[~2013-12-16 19:19 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-12  7:57 [PATCHv7 00/12] Unifying SMMU driver among Tegra SoCs Hiroshi Doyu
2013-12-12  7:57 ` [PATCHv7 01/12] of: introduce of_property_for_each_phandle_with_args() Hiroshi Doyu
2013-12-16 18:29   ` Stephen Warren
2013-12-12  7:57 ` [PATCHv7 02/12] iommu/of: introduce a global iommu device list Hiroshi Doyu
2013-12-16 18:32   ` Stephen Warren
2013-12-12  7:57 ` [PATCHv7 03/12] iommu/of: check if dependee iommu is ready or not Hiroshi Doyu
2013-12-16 18:34   ` Stephen Warren
2013-12-12  7:57 ` [PATCHv7 04/12] driver/core: populate devices in order for IOMMUs Hiroshi Doyu
2013-12-12 11:39   ` Grant Likely
2013-12-13  2:14     ` Greg KH
2013-12-14 12:24       ` Thierry Reding
2013-12-14 14:28         ` Hiroshi Doyu
2013-12-16 18:26       ` Stephen Warren
2013-12-12  7:57 ` [PATCHv7 05/12] iommu/core: add ops->{bound,unbind}_driver() Hiroshi Doyu
2013-12-16 18:42   ` Stephen Warren
2013-12-30 13:45   ` Joerg Roedel
2013-12-12  7:57 ` [PATCHv7 06/12] ARM: tegra: create a DT header defining SWGROUP ID Hiroshi Doyu
2013-12-18  8:02   ` Mark Zhang
2013-12-18 16:27     ` Stephen Warren
2013-12-20 12:35       ` Thierry Reding
2013-12-20 17:36         ` Stephen Warren
2013-12-12  7:57 ` [PATCHv7 07/12] iommu/tegra: smmu: register device to iommu dynamically Hiroshi Doyu
2013-12-16 18:46   ` Stephen Warren
2013-12-12  7:57 ` [PATCHv7 08/12] iommu/tegra: smmu: calculate ASID register offset by ID Hiroshi Doyu
2013-12-16 19:02   ` Stephen Warren
2013-12-12  7:57 ` [PATCHv7 09/12] iommu/tegra: smmu: get swgroups from DT "iommus=" Hiroshi Doyu
2013-12-16 19:09   ` Stephen Warren
2013-12-12  7:57 ` [PATCHv7 10/12] iommu/tegra: smmu: allow duplicate ASID wirte Hiroshi Doyu
2013-12-16 19:19   ` Stephen Warren [this message]
2013-12-12  7:57 ` [PATCHv7 11/12] iommu/tegra: smmu: Rename hwgrp -> swgroups Hiroshi Doyu
2013-12-12  7:57 ` [PATCHv7 12/12] iommu/tegra: smmu: add SMMU to an global iommu list Hiroshi Doyu

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