[PATCH v3 0/2] gpio: davinci: reuse for keystone arch

[PATCH v3 0/2] gpio: davinci: reuse for keystone arch

[Grygorii Strashko]

This series is intended to update Davinci GPIO driver and reuse
it for Keystone SoCs, because Keystone uses the similar GPIO IP like Davinci.
Keystone GPIO IP: supports:
- up to 32 GPIO lines;
- only unbanked irqs;

See Documentation:
Keystone - http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf

This series based on:
https://git.kernel.org/cgit/linux/kernel/git/nsekhar/linux-davinci.git/log/?h=v3.14/gpio

Changes in v3:
- fixed code, changed by mistake; fixed sparse warning 
Changes in v2:
- minor comments applied, no functional changes

v2: https://lkml.org/lkml/2013/12/18/135
v1: https://lkml.org/lkml/2013/12/12/366

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>

Grygorii Strashko (2):
  gpio: davinci: don't create irq_domain in case of unbanked irqs
  gpio: davinci: reuse for Keystone SoC

 .../devicetree/bindings/gpio/gpio-davinci.txt      |    4 +-
 drivers/gpio/gpio-davinci.c                        |   82 ++++++++++++++------
 2 files changed, 61 insertions(+), 25 deletions(-)

-- 
1.7.9.5

[PATCH v3 1/2] gpio: davinci: don't create irq_domain in case of unbanked irqs

[Grygorii Strashko]

The system may crash if:
- there are more than 1 bank
- unbanked irqs are enabled
- someone will call gpio_to_irq() for GPIO from bank2 or above

Hence, fix it by not creating irq_domain if unbanked irqs are enabled
and correct gpio_to_irq_banked() to handle this properly.

Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Sekhar Nori <nsekhar@ti.com>

Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
---
 drivers/gpio/gpio-davinci.c |   34 +++++++++++++++++++---------------
 1 file changed, 19 insertions(+), 15 deletions(-)

diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index 5d163c0..7629b4f 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -351,7 +351,10 @@ static int gpio_to_irq_banked(struct gpio_chip *chip, unsigned offset)
 {
 	struct davinci_gpio_controller *d = chip2controller(chip);
 
-	return irq_create_mapping(d->irq_domain, d->chip.base + offset);
+	if (d->irq_domain)
+		return irq_create_mapping(d->irq_domain, d->chip.base + offset);
+	else
+		return -ENXIO;
 }
 
 static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset)
@@ -429,7 +432,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
 	struct davinci_gpio_controller *chips = platform_get_drvdata(pdev);
 	struct davinci_gpio_platform_data *pdata = dev->platform_data;
 	struct davinci_gpio_regs __iomem *g;
-	struct irq_domain	*irq_domain;
+	struct irq_domain	*irq_domain = NULL;
 
 	ngpio = pdata->ngpio;
 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
@@ -453,18 +456,20 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
 	}
 	clk_prepare_enable(clk);
 
-	irq = irq_alloc_descs(-1, 0, ngpio, 0);
-	if (irq < 0) {
-		dev_err(dev, "Couldn't allocate IRQ numbers\n");
-		return irq;
-	}
+	if (!pdata->gpio_unbanked) {
+		irq = irq_alloc_descs(-1, 0, ngpio, 0);
+		if (irq < 0) {
+			dev_err(dev, "Couldn't allocate IRQ numbers\n");
+			return irq;
+		}
 
-	irq_domain = irq_domain_add_legacy(NULL, ngpio, irq, 0,
-						&davinci_gpio_irq_ops,
-						chips);
-	if (!irq_domain) {
-		dev_err(dev, "Couldn't register an IRQ domain\n");
-		return -ENODEV;
+		irq_domain = irq_domain_add_legacy(NULL, ngpio, irq, 0,
+							&davinci_gpio_irq_ops,
+							chips);
+		if (!irq_domain) {
+			dev_err(dev, "Couldn't register an IRQ domain\n");
+			return -ENODEV;
+		}
 	}
 
 	/*
@@ -475,8 +480,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
 	 */
 	for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) {
 		chips[bank].chip.to_irq = gpio_to_irq_banked;
-		if (!pdata->gpio_unbanked)
-			chips[bank].irq_domain = irq_domain;
+		chips[bank].irq_domain = irq_domain;
 	}
 
 	/*
-- 
1.7.9.5

[PATCH v3 2/2] gpio: davinci: reuse for Keystone SoC

[Grygorii Strashko]

The similar GPIO HW block is used by keystone SoCs as
in Davinci SoCs.
Hence, reuse Davinci GPIO driver for Keystone taking into
account that Keystone contains ARM GIC IRQ controller which
is implemented using IRQ Chip.

Documentation:
	http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf

Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: Sekhar Nori <nsekhar@ti.com>
Cc: devicetree@vger.kernel.org

Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
---
 .../devicetree/bindings/gpio/gpio-davinci.txt      |    4 +-
 drivers/gpio/gpio-davinci.c                        |   48 ++++++++++++++++----
 2 files changed, 42 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
index a2e839d..4ce9862 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
@@ -1,7 +1,7 @@
-Davinci GPIO controller bindings
+Davinci/Keystone GPIO controller bindings
 
 Required Properties:
-- compatible: should be "ti,dm6441-gpio"
+- compatible: should be "ti,dm6441-gpio", "ti,keystone-gpio"
 
 - reg: Physical base address of the controller and the size of memory mapped
        registers.
diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
index 7629b4f..d0f135d 100644
--- a/drivers/gpio/gpio-davinci.c
+++ b/drivers/gpio/gpio-davinci.c
@@ -37,6 +37,8 @@ struct davinci_gpio_regs {
 	u32	intstat;
 };
 
+typedef struct irq_chip *(*gpio_get_irq_chip_cb_t)(unsigned int irq);
+
 #define BINTEN	0x8 /* GPIO Interrupt Per-Bank Enable Register */
 
 #define chip2controller(chip)	\
@@ -413,6 +415,26 @@ static const struct irq_domain_ops davinci_gpio_irq_ops = {
 	.xlate = irq_domain_xlate_onetwocell,
 };
 
+static struct irq_chip *davinci_gpio_get_irq_chip(unsigned int irq)
+{
+	static struct irq_chip_type gpio_unbanked;
+
+	gpio_unbanked = *container_of(irq_get_chip(irq),
+				      struct irq_chip_type, chip);
+
+	return &gpio_unbanked.chip;
+};
+
+static struct irq_chip *keystone_gpio_get_irq_chip(unsigned int irq)
+{
+	static struct irq_chip gpio_unbanked;
+
+	gpio_unbanked = *irq_get_chip(irq);
+	return &gpio_unbanked;
+};
+
+static const struct of_device_id davinci_gpio_ids[];
+
 /*
  * NOTE:  for suspend/resume, probably best to make a platform_device with
  * suspend_late/resume_resume calls hooking into results of the set_wake()
@@ -433,6 +455,18 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
 	struct davinci_gpio_platform_data *pdata = dev->platform_data;
 	struct davinci_gpio_regs __iomem *g;
 	struct irq_domain	*irq_domain = NULL;
+	const struct of_device_id *match;
+	struct irq_chip *irq_chip;
+	gpio_get_irq_chip_cb_t gpio_get_irq_chip;
+
+	/*
+	 * Use davinci_gpio_get_irq_chip by default to handle non DT cases
+	 */
+	gpio_get_irq_chip = davinci_gpio_get_irq_chip;
+	match = of_match_device(of_match_ptr(davinci_gpio_ids),
+				dev);
+	if (match)
+		gpio_get_irq_chip = (gpio_get_irq_chip_cb_t)match->data;
 
 	ngpio = pdata->ngpio;
 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
@@ -489,8 +523,6 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
 	 * IRQ mux conflicts; gpio_irq_type_unbanked() is only for GPIOs.
 	 */
 	if (pdata->gpio_unbanked) {
-		static struct irq_chip_type gpio_unbanked;
-
 		/* pass "bank 0" GPIO IRQs to AINTC */
 		chips[0].chip.to_irq = gpio_to_irq_unbanked;
 		chips[0].gpio_irq = bank_irq;
@@ -499,10 +531,9 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
 
 		/* AINTC handles mask/unmask; GPIO handles triggering */
 		irq = bank_irq;
-		gpio_unbanked = *container_of(irq_get_chip(irq),
-					      struct irq_chip_type, chip);
-		gpio_unbanked.chip.name = "GPIO-AINTC";
-		gpio_unbanked.chip.irq_set_type = gpio_irq_type_unbanked;
+		irq_chip = gpio_get_irq_chip(irq);
+		irq_chip->name = "GPIO-AINTC";
+		irq_chip->irq_set_type = gpio_irq_type_unbanked;
 
 		/* default trigger: both edges */
 		g = gpio2regs(0);
@@ -511,7 +542,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
 
 		/* set the direct IRQs up to use that irqchip */
 		for (gpio = 0; gpio < pdata->gpio_unbanked; gpio++, irq++) {
-			irq_set_chip(irq, &gpio_unbanked.chip);
+			irq_set_chip(irq, irq_chip);
 			irq_set_handler_data(irq, &chips[gpio / 32]);
 			irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH);
 		}
@@ -554,7 +585,8 @@ done:
 
 #if IS_ENABLED(CONFIG_OF)
 static const struct of_device_id davinci_gpio_ids[] = {
-	{ .compatible = "ti,dm6441-gpio", },
+	{ .compatible = "ti,keystone-gpio", keystone_gpio_get_irq_chip},
+	{ .compatible = "ti,dm6441-gpio", davinci_gpio_get_irq_chip},
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, davinci_gpio_ids);
-- 
1.7.9.5

Re: [PATCH v3 2/2] gpio: davinci: reuse for Keystone SoC

[Prabhakar Lad]

Hi Grygorii,

Thanks for the patch.

On Tue, Dec 24, 2013 at 5:11 PM, Grygorii Strashko
<grygorii.strashko@ti.com> wrote:
> The similar GPIO HW block is used by keystone SoCs as
> in Davinci SoCs.
> Hence, reuse Davinci GPIO driver for Keystone taking into
> account that Keystone contains ARM GIC IRQ controller which
> is implemented using IRQ Chip.
>
> Documentation:
>         http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf
>
> Cc: Alexandre Courbot <gnurou@gmail.com>
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: devicetree@vger.kernel.org
>
> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
> ---
>  .../devicetree/bindings/gpio/gpio-davinci.txt      |    4 +-
>  drivers/gpio/gpio-davinci.c                        |   48 ++++++++++++++++----
>  2 files changed, 42 insertions(+), 10 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
> index a2e839d..4ce9862 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
> +++ b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
> @@ -1,7 +1,7 @@
> -Davinci GPIO controller bindings
> +Davinci/Keystone GPIO controller bindings
>
>  Required Properties:
> -- compatible: should be "ti,dm6441-gpio"
> +- compatible: should be "ti,dm6441-gpio", "ti,keystone-gpio"

Can you make it something like this ? It isn't readable.

- compatible : value should be either one among the following
    (a)  "ti,dm6441-gpio" for davinci.
    (b)  "ti,keystone-gpio" for keystone.

>
>  - reg: Physical base address of the controller and the size of memory mapped
>         registers.
> diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
> index 7629b4f..d0f135d 100644
> --- a/drivers/gpio/gpio-davinci.c
> +++ b/drivers/gpio/gpio-davinci.c
> @@ -37,6 +37,8 @@ struct davinci_gpio_regs {
>         u32     intstat;
>  };
>
> +typedef struct irq_chip *(*gpio_get_irq_chip_cb_t)(unsigned int irq);
> +
>  #define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */
>
>  #define chip2controller(chip)  \
> @@ -413,6 +415,26 @@ static const struct irq_domain_ops davinci_gpio_irq_ops = {
>         .xlate = irq_domain_xlate_onetwocell,
>  };
>
> +static struct irq_chip *davinci_gpio_get_irq_chip(unsigned int irq)
> +{
> +       static struct irq_chip_type gpio_unbanked;
> +
> +       gpio_unbanked = *container_of(irq_get_chip(irq),
> +                                     struct irq_chip_type, chip);
> +
> +       return &gpio_unbanked.chip;
> +};
> +
> +static struct irq_chip *keystone_gpio_get_irq_chip(unsigned int irq)
> +{
> +       static struct irq_chip gpio_unbanked;
> +
> +       gpio_unbanked = *irq_get_chip(irq);
> +       return &gpio_unbanked;
> +};
> +
> +static const struct of_device_id davinci_gpio_ids[];
> +
>  /*
>   * NOTE:  for suspend/resume, probably best to make a platform_device with
>   * suspend_late/resume_resume calls hooking into results of the set_wake()
> @@ -433,6 +455,18 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
>         struct davinci_gpio_platform_data *pdata = dev->platform_data;
>         struct davinci_gpio_regs __iomem *g;
>         struct irq_domain       *irq_domain = NULL;
> +       const struct of_device_id *match;
> +       struct irq_chip *irq_chip;
> +       gpio_get_irq_chip_cb_t gpio_get_irq_chip;
> +
> +       /*
> +        * Use davinci_gpio_get_irq_chip by default to handle non DT cases
> +        */
> +       gpio_get_irq_chip = davinci_gpio_get_irq_chip;
> +       match = of_match_device(of_match_ptr(davinci_gpio_ids),
> +                               dev);

Sorry didn't notice that earlier the data structure of_match_ptr()
protects is always compiled in.
so of_match_ptr() is not needed.
While you are at it you can also fix it in davinci_gpio_driver
structure as a sperate
patch.

Regards,
--Prabhakar Lad

> +       if (match)
> +               gpio_get_irq_chip = (gpio_get_irq_chip_cb_t)match->data;
>
>         ngpio = pdata->ngpio;
>         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> @@ -489,8 +523,6 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
>          * IRQ mux conflicts; gpio_irq_type_unbanked() is only for GPIOs.
>          */
>         if (pdata->gpio_unbanked) {
> -               static struct irq_chip_type gpio_unbanked;
> -
>                 /* pass "bank 0" GPIO IRQs to AINTC */
>                 chips[0].chip.to_irq = gpio_to_irq_unbanked;
>                 chips[0].gpio_irq = bank_irq;
> @@ -499,10 +531,9 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
>
>                 /* AINTC handles mask/unmask; GPIO handles triggering */
>                 irq = bank_irq;
> -               gpio_unbanked = *container_of(irq_get_chip(irq),
> -                                             struct irq_chip_type, chip);
> -               gpio_unbanked.chip.name = "GPIO-AINTC";
> -               gpio_unbanked.chip.irq_set_type = gpio_irq_type_unbanked;
> +               irq_chip = gpio_get_irq_chip(irq);
> +               irq_chip->name = "GPIO-AINTC";
> +               irq_chip->irq_set_type = gpio_irq_type_unbanked;
>
>                 /* default trigger: both edges */
>                 g = gpio2regs(0);
> @@ -511,7 +542,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
>
>                 /* set the direct IRQs up to use that irqchip */
>                 for (gpio = 0; gpio < pdata->gpio_unbanked; gpio++, irq++) {
> -                       irq_set_chip(irq, &gpio_unbanked.chip);
> +                       irq_set_chip(irq, irq_chip);
>                         irq_set_handler_data(irq, &chips[gpio / 32]);
>                         irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH);
>                 }
> @@ -554,7 +585,8 @@ done:
>
>  #if IS_ENABLED(CONFIG_OF)
>  static const struct of_device_id davinci_gpio_ids[] = {
> -       { .compatible = "ti,dm6441-gpio", },
> +       { .compatible = "ti,keystone-gpio", keystone_gpio_get_irq_chip},
> +       { .compatible = "ti,dm6441-gpio", davinci_gpio_get_irq_chip},
>         { /* sentinel */ },
>  };
>  MODULE_DEVICE_TABLE(of, davinci_gpio_ids);
> --
> 1.7.9.5
>

Re: [PATCH v3 2/2] gpio: davinci: reuse for Keystone SoC

[Grygorii Strashko]

On 12/24/2013 01:20 PM, Prabhakar Lad wrote:
> Hi Grygorii,
>
> Thanks for the patch.
>
> On Tue, Dec 24, 2013 at 5:11 PM, Grygorii Strashko
> <grygorii.strashko@ti.com> wrote:
>> The similar GPIO HW block is used by keystone SoCs as
>> in Davinci SoCs.
>> Hence, reuse Davinci GPIO driver for Keystone taking into
>> account that Keystone contains ARM GIC IRQ controller which
>> is implemented using IRQ Chip.
>>
>> Documentation:
>>          http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf
>>
>> Cc: Alexandre Courbot <gnurou@gmail.com>
>> Cc: Sekhar Nori <nsekhar@ti.com>
>> Cc: devicetree@vger.kernel.org
>>
>> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
>> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
>> ---
>>   .../devicetree/bindings/gpio/gpio-davinci.txt      |    4 +-
>>   drivers/gpio/gpio-davinci.c                        |   48 ++++++++++++++++----
>>   2 files changed, 42 insertions(+), 10 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
>> index a2e839d..4ce9862 100644
>> --- a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
>> +++ b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
>> @@ -1,7 +1,7 @@
>> -Davinci GPIO controller bindings
>> +Davinci/Keystone GPIO controller bindings
>>
>>   Required Properties:
>> -- compatible: should be "ti,dm6441-gpio"
>> +- compatible: should be "ti,dm6441-gpio", "ti,keystone-gpio"
>
> Can you make it something like this ? It isn't readable.
>
> - compatible : value should be either one among the following
>      (a)  "ti,dm6441-gpio" for davinci.
>      (b)  "ti,keystone-gpio" for keystone.
>
>>
>>   - reg: Physical base address of the controller and the size of memory mapped
>>          registers.
>> diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
>> index 7629b4f..d0f135d 100644
>> --- a/drivers/gpio/gpio-davinci.c
>> +++ b/drivers/gpio/gpio-davinci.c
>> @@ -37,6 +37,8 @@ struct davinci_gpio_regs {
>>          u32     intstat;
>>   };
>>
>> +typedef struct irq_chip *(*gpio_get_irq_chip_cb_t)(unsigned int irq);
>> +
>>   #define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */
>>
>>   #define chip2controller(chip)  \
>> @@ -413,6 +415,26 @@ static const struct irq_domain_ops davinci_gpio_irq_ops = {
>>          .xlate = irq_domain_xlate_onetwocell,
>>   };
>>
>> +static struct irq_chip *davinci_gpio_get_irq_chip(unsigned int irq)
>> +{
>> +       static struct irq_chip_type gpio_unbanked;
>> +
>> +       gpio_unbanked = *container_of(irq_get_chip(irq),
>> +                                     struct irq_chip_type, chip);
>> +
>> +       return &gpio_unbanked.chip;
>> +};
>> +
>> +static struct irq_chip *keystone_gpio_get_irq_chip(unsigned int irq)
>> +{
>> +       static struct irq_chip gpio_unbanked;
>> +
>> +       gpio_unbanked = *irq_get_chip(irq);
>> +       return &gpio_unbanked;
>> +};
>> +
>> +static const struct of_device_id davinci_gpio_ids[];
>> +
>>   /*
>>    * NOTE:  for suspend/resume, probably best to make a platform_device with
>>    * suspend_late/resume_resume calls hooking into results of the set_wake()
>> @@ -433,6 +455,18 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
>>          struct davinci_gpio_platform_data *pdata = dev->platform_data;
>>          struct davinci_gpio_regs __iomem *g;
>>          struct irq_domain       *irq_domain = NULL;
>> +       const struct of_device_id *match;
>> +       struct irq_chip *irq_chip;
>> +       gpio_get_irq_chip_cb_t gpio_get_irq_chip;
>> +
>> +       /*
>> +        * Use davinci_gpio_get_irq_chip by default to handle non DT cases
>> +        */
>> +       gpio_get_irq_chip = davinci_gpio_get_irq_chip;
>> +       match = of_match_device(of_match_ptr(davinci_gpio_ids),
>> +                               dev);
>
> Sorry didn't notice that earlier the data structure of_match_ptr()
> protects is always compiled in.
> so of_match_ptr() is not needed.
> While you are at it you can also fix it in davinci_gpio_driver
> structure as a sperate
> patch.
>

Not sure. davinci_gpio_ids defined as:

#if IS_ENABLED(CONFIG_OF)
static const struct of_device_id davinci_gpio_ids[] = {

And seems, Davinci may still be compiled without OF enabled.

Regards,
- grygorii

Re: [PATCH v3 2/2] gpio: davinci: reuse for Keystone SoC

[Prabhakar Lad]

On Tue, Dec 24, 2013 at 6:57 PM, Grygorii Strashko
<grygorii.strashko@ti.com> wrote:
> On 12/24/2013 01:20 PM, Prabhakar Lad wrote:
>>
>> Hi Grygorii,
>>
>> Thanks for the patch.
>>
>> On Tue, Dec 24, 2013 at 5:11 PM, Grygorii Strashko
>> <grygorii.strashko@ti.com> wrote:
>>>
>>> The similar GPIO HW block is used by keystone SoCs as
>>> in Davinci SoCs.
>>> Hence, reuse Davinci GPIO driver for Keystone taking into
>>> account that Keystone contains ARM GIC IRQ controller which
>>> is implemented using IRQ Chip.
>>>
>>> Documentation:
>>>          http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf
>>>
>>> Cc: Alexandre Courbot <gnurou@gmail.com>
>>> Cc: Sekhar Nori <nsekhar@ti.com>
>>> Cc: devicetree@vger.kernel.org
>>>
>>> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
>>> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>>> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
>>> ---
>>>   .../devicetree/bindings/gpio/gpio-davinci.txt      |    4 +-
>>>   drivers/gpio/gpio-davinci.c                        |   48
>>> ++++++++++++++++----
>>>   2 files changed, 42 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
>>> b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
>>> index a2e839d..4ce9862 100644
>>> --- a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
>>> +++ b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
>>> @@ -1,7 +1,7 @@
>>> -Davinci GPIO controller bindings
>>> +Davinci/Keystone GPIO controller bindings
>>>
>>>   Required Properties:
>>> -- compatible: should be "ti,dm6441-gpio"
>>> +- compatible: should be "ti,dm6441-gpio", "ti,keystone-gpio"
>>
>>
>> Can you make it something like this ? It isn't readable.
>>
>> - compatible : value should be either one among the following
>>      (a)  "ti,dm6441-gpio" for davinci.
>>      (b)  "ti,keystone-gpio" for keystone.
>>
>>>
>>>   - reg: Physical base address of the controller and the size of memory
>>> mapped
>>>          registers.
>>> diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
>>> index 7629b4f..d0f135d 100644
>>> --- a/drivers/gpio/gpio-davinci.c
>>> +++ b/drivers/gpio/gpio-davinci.c
>>> @@ -37,6 +37,8 @@ struct davinci_gpio_regs {
>>>          u32     intstat;
>>>   };
>>>
>>> +typedef struct irq_chip *(*gpio_get_irq_chip_cb_t)(unsigned int irq);
>>> +
>>>   #define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */
>>>
>>>   #define chip2controller(chip)  \
>>> @@ -413,6 +415,26 @@ static const struct irq_domain_ops
>>> davinci_gpio_irq_ops = {
>>>          .xlate = irq_domain_xlate_onetwocell,
>>>   };
>>>
>>> +static struct irq_chip *davinci_gpio_get_irq_chip(unsigned int irq)
>>> +{
>>> +       static struct irq_chip_type gpio_unbanked;
>>> +
>>> +       gpio_unbanked = *container_of(irq_get_chip(irq),
>>> +                                     struct irq_chip_type, chip);
>>> +
>>> +       return &gpio_unbanked.chip;
>>> +};
>>> +
>>> +static struct irq_chip *keystone_gpio_get_irq_chip(unsigned int irq)
>>> +{
>>> +       static struct irq_chip gpio_unbanked;
>>> +
>>> +       gpio_unbanked = *irq_get_chip(irq);
>>> +       return &gpio_unbanked;
>>> +};
>>> +
>>> +static const struct of_device_id davinci_gpio_ids[];
>>> +
>>>   /*
>>>    * NOTE:  for suspend/resume, probably best to make a platform_device
>>> with
>>>    * suspend_late/resume_resume calls hooking into results of the
>>> set_wake()
>>> @@ -433,6 +455,18 @@ static int davinci_gpio_irq_setup(struct
>>> platform_device *pdev)
>>>          struct davinci_gpio_platform_data *pdata = dev->platform_data;
>>>          struct davinci_gpio_regs __iomem *g;
>>>          struct irq_domain       *irq_domain = NULL;
>>> +       const struct of_device_id *match;
>>> +       struct irq_chip *irq_chip;
>>> +       gpio_get_irq_chip_cb_t gpio_get_irq_chip;
>>> +
>>> +       /*
>>> +        * Use davinci_gpio_get_irq_chip by default to handle non DT
>>> cases
>>> +        */
>>> +       gpio_get_irq_chip = davinci_gpio_get_irq_chip;
>>> +       match = of_match_device(of_match_ptr(davinci_gpio_ids),
>>> +                               dev);
>>
>>
>> Sorry didn't notice that earlier the data structure of_match_ptr()
>> protects is always compiled in.
>> so of_match_ptr() is not needed.
>> While you are at it you can also fix it in davinci_gpio_driver
>> structure as a sperate
>> patch.
>>
>
> Not sure. davinci_gpio_ids defined as:
>
>
> #if IS_ENABLED(CONFIG_OF)
> static const struct of_device_id davinci_gpio_ids[] = {
>
> And seems, Davinci may still be compiled without OF enabled.
>
My Bad, yes its gaurded by CONFIG_OF so my above suggestion doesn't hold good.

Thanks,
--Prabhakar Lad

Re: [PATCH v3 2/2] gpio: davinci: reuse for Keystone SoC

[Grygorii Strashko]

Hi Rob,

On 12/24/2013 01:41 PM, Grygorii Strashko wrote:
> The similar GPIO HW block is used by keystone SoCs as
> in Davinci SoCs.
> Hence, reuse Davinci GPIO driver for Keystone taking into
> account that Keystone contains ARM GIC IRQ controller which
> is implemented using IRQ Chip.
>
> Documentation:
> 	http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf
>
> Cc: Alexandre Courbot <gnurou@gmail.com>
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: devicetree@vger.kernel.org
>
> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
> ---
>   .../devicetree/bindings/gpio/gpio-davinci.txt      |    4 +-
>   drivers/gpio/gpio-davinci.c                        |   48 ++++++++++++++++----
>   2 files changed, 42 insertions(+), 10 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
> index a2e839d..4ce9862 100644
> --- a/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
> +++ b/Documentation/devicetree/bindings/gpio/gpio-davinci.txt
> @@ -1,7 +1,7 @@
> -Davinci GPIO controller bindings
> +Davinci/Keystone GPIO controller bindings
>
>   Required Properties:
> -- compatible: should be "ti,dm6441-gpio"
> +- compatible: should be "ti,dm6441-gpio", "ti,keystone-gpio"

Do you agree with this bindings changes?
They are very simple

>
>   - reg: Physical base address of the controller and the size of memory mapped
>          registers.
> diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c
> index 7629b4f..d0f135d 100644
> --- a/drivers/gpio/gpio-davinci.c
> +++ b/drivers/gpio/gpio-davinci.c
> @@ -37,6 +37,8 @@ struct davinci_gpio_regs {
>   	u32	intstat;
>   };
>
> +typedef struct irq_chip *(*gpio_get_irq_chip_cb_t)(unsigned int irq);
> +
>   #define BINTEN	0x8 /* GPIO Interrupt Per-Bank Enable Register */
>
>   #define chip2controller(chip)	\
> @@ -413,6 +415,26 @@ static const struct irq_domain_ops davinci_gpio_irq_ops = {
>   	.xlate = irq_domain_xlate_onetwocell,
>   };
>
> +static struct irq_chip *davinci_gpio_get_irq_chip(unsigned int irq)
> +{
> +	static struct irq_chip_type gpio_unbanked;
> +
> +	gpio_unbanked = *container_of(irq_get_chip(irq),
> +				      struct irq_chip_type, chip);
> +
> +	return &gpio_unbanked.chip;
> +};
> +
> +static struct irq_chip *keystone_gpio_get_irq_chip(unsigned int irq)
> +{
> +	static struct irq_chip gpio_unbanked;
> +
> +	gpio_unbanked = *irq_get_chip(irq);
> +	return &gpio_unbanked;
> +};
> +
> +static const struct of_device_id davinci_gpio_ids[];
> +
>   /*
>    * NOTE:  for suspend/resume, probably best to make a platform_device with
>    * suspend_late/resume_resume calls hooking into results of the set_wake()
> @@ -433,6 +455,18 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
>   	struct davinci_gpio_platform_data *pdata = dev->platform_data;
>   	struct davinci_gpio_regs __iomem *g;
>   	struct irq_domain	*irq_domain = NULL;
> +	const struct of_device_id *match;
> +	struct irq_chip *irq_chip;
> +	gpio_get_irq_chip_cb_t gpio_get_irq_chip;
> +
> +	/*
> +	 * Use davinci_gpio_get_irq_chip by default to handle non DT cases
> +	 */
> +	gpio_get_irq_chip = davinci_gpio_get_irq_chip;
> +	match = of_match_device(of_match_ptr(davinci_gpio_ids),
> +				dev);
> +	if (match)
> +		gpio_get_irq_chip = (gpio_get_irq_chip_cb_t)match->data;
>
>   	ngpio = pdata->ngpio;
>   	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> @@ -489,8 +523,6 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
>   	 * IRQ mux conflicts; gpio_irq_type_unbanked() is only for GPIOs.
>   	 */
>   	if (pdata->gpio_unbanked) {
> -		static struct irq_chip_type gpio_unbanked;
> -
>   		/* pass "bank 0" GPIO IRQs to AINTC */
>   		chips[0].chip.to_irq = gpio_to_irq_unbanked;
>   		chips[0].gpio_irq = bank_irq;
> @@ -499,10 +531,9 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
>
>   		/* AINTC handles mask/unmask; GPIO handles triggering */
>   		irq = bank_irq;
> -		gpio_unbanked = *container_of(irq_get_chip(irq),
> -					      struct irq_chip_type, chip);
> -		gpio_unbanked.chip.name = "GPIO-AINTC";
> -		gpio_unbanked.chip.irq_set_type = gpio_irq_type_unbanked;
> +		irq_chip = gpio_get_irq_chip(irq);
> +		irq_chip->name = "GPIO-AINTC";
> +		irq_chip->irq_set_type = gpio_irq_type_unbanked;
>
>   		/* default trigger: both edges */
>   		g = gpio2regs(0);
> @@ -511,7 +542,7 @@ static int davinci_gpio_irq_setup(struct platform_device *pdev)
>
>   		/* set the direct IRQs up to use that irqchip */
>   		for (gpio = 0; gpio < pdata->gpio_unbanked; gpio++, irq++) {
> -			irq_set_chip(irq, &gpio_unbanked.chip);
> +			irq_set_chip(irq, irq_chip);
>   			irq_set_handler_data(irq, &chips[gpio / 32]);
>   			irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH);
>   		}
> @@ -554,7 +585,8 @@ done:
>
>   #if IS_ENABLED(CONFIG_OF)
>   static const struct of_device_id davinci_gpio_ids[] = {
> -	{ .compatible = "ti,dm6441-gpio", },
> +	{ .compatible = "ti,keystone-gpio", keystone_gpio_get_irq_chip},
> +	{ .compatible = "ti,dm6441-gpio", davinci_gpio_get_irq_chip},
>   	{ /* sentinel */ },
>   };
>   MODULE_DEVICE_TABLE(of, davinci_gpio_ids);
>

Re: [PATCH v3 0/2] gpio: davinci: reuse for keystone arch

[Santosh Shilimkar]

Sekhar,

On Tuesday 24 December 2013 06:41 AM, Grygorii Strashko wrote:
> This series is intended to update Davinci GPIO driver and reuse
> it for Keystone SoCs, because Keystone uses the similar GPIO IP like Davinci.
> Keystone GPIO IP: supports:
> - up to 32 GPIO lines;
> - only unbanked irqs;
> 
> See Documentation:
> Keystone - http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf
> 
> This series based on:
> https://git.kernel.org/cgit/linux/kernel/git/nsekhar/linux-davinci.git/log/?h=v3.14/gpio
> 
> Changes in v3:
> - fixed code, changed by mistake; fixed sparse warning 
> Changes in v2:
> - minor comments applied, no functional changes
> 
> v2: https://lkml.org/lkml/2013/12/18/135
> v1: https://lkml.org/lkml/2013/12/12/366
> 
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Cc: Alexandre Courbot <gnurou@gmail.com>
> Cc: Sekhar Nori <nsekhar@ti.com>
> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> 
> Grygorii Strashko (2):
>   gpio: davinci: don't create irq_domain in case of unbanked irqs
>   gpio: davinci: reuse for Keystone SoC
> 
>  .../devicetree/bindings/gpio/gpio-davinci.txt      |    4 +-
>  drivers/gpio/gpio-davinci.c                        |   82 ++++++++++++++------
>  2 files changed, 61 insertions(+), 25 deletions(-)
> 
Have you picked up the $subject series in your queue ?

Regards,
Santosh

Re: [PATCH v3 0/2] gpio: davinci: reuse for keystone arch

[Sekhar Nori]

On Tuesday 07 January 2014 11:22 PM, Santosh Shilimkar wrote:
> Sekhar,
> 
> On Tuesday 24 December 2013 06:41 AM, Grygorii Strashko wrote:
>> This series is intended to update Davinci GPIO driver and reuse
>> it for Keystone SoCs, because Keystone uses the similar GPIO IP like Davinci.
>> Keystone GPIO IP: supports:
>> - up to 32 GPIO lines;
>> - only unbanked irqs;
>>
>> See Documentation:
>> Keystone - http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf
>>
>> This series based on:
>> https://git.kernel.org/cgit/linux/kernel/git/nsekhar/linux-davinci.git/log/?h=v3.14/gpio
>>
>> Changes in v3:
>> - fixed code, changed by mistake; fixed sparse warning 
>> Changes in v2:
>> - minor comments applied, no functional changes
>>
>> v2: https://lkml.org/lkml/2013/12/18/135
>> v1: https://lkml.org/lkml/2013/12/12/366
>>
>> Cc: Linus Walleij <linus.walleij@linaro.org>
>> Cc: Alexandre Courbot <gnurou@gmail.com>
>> Cc: Sekhar Nori <nsekhar@ti.com>
>> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
>>
>> Grygorii Strashko (2):
>>   gpio: davinci: don't create irq_domain in case of unbanked irqs
>>   gpio: davinci: reuse for Keystone SoC
>>
>>  .../devicetree/bindings/gpio/gpio-davinci.txt      |    4 +-
>>  drivers/gpio/gpio-davinci.c                        |   82 ++++++++++++++------
>>  2 files changed, 61 insertions(+), 25 deletions(-)
>>
> Have you picked up the $subject series in your queue ?

Not yet, at least on the new compatible introduction, I need an ack from
DT folks.

I am happy with the patches though and have tested them as well, In case
I do not get an ack from 2/2 in time, I can at least send 1/2 for
inclusion after my first gpio pull request to ARM-SoC gets pulled.

Thanks,
Sekhar

Re: [PATCH v3 0/2] gpio: davinci: reuse for keystone arch

[Santosh Shilimkar]

On Tuesday 07 January 2014 11:06 PM, Sekhar Nori wrote:
> On Tuesday 07 January 2014 11:22 PM, Santosh Shilimkar wrote:
>> Sekhar,
>>
>> On Tuesday 24 December 2013 06:41 AM, Grygorii Strashko wrote:
>>> This series is intended to update Davinci GPIO driver and reuse
>>> it for Keystone SoCs, because Keystone uses the similar GPIO IP like Davinci.
>>> Keystone GPIO IP: supports:
>>> - up to 32 GPIO lines;
>>> - only unbanked irqs;
>>>
>>> See Documentation:
>>> Keystone - http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf
>>>
>>> This series based on:
>>> https://git.kernel.org/cgit/linux/kernel/git/nsekhar/linux-davinci.git/log/?h=v3.14/gpio
>>>
>>> Changes in v3:
>>> - fixed code, changed by mistake; fixed sparse warning 
>>> Changes in v2:
>>> - minor comments applied, no functional changes
>>>
>>> v2: https://lkml.org/lkml/2013/12/18/135
>>> v1: https://lkml.org/lkml/2013/12/12/366
>>>
>>> Cc: Linus Walleij <linus.walleij@linaro.org>
>>> Cc: Alexandre Courbot <gnurou@gmail.com>
>>> Cc: Sekhar Nori <nsekhar@ti.com>
>>> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
>>>
>>> Grygorii Strashko (2):
>>>   gpio: davinci: don't create irq_domain in case of unbanked irqs
>>>   gpio: davinci: reuse for Keystone SoC
>>>
>>>  .../devicetree/bindings/gpio/gpio-davinci.txt      |    4 +-
>>>  drivers/gpio/gpio-davinci.c                        |   82 ++++++++++++++------
>>>  2 files changed, 61 insertions(+), 25 deletions(-)
>>>
>> Have you picked up the $subject series in your queue ?
> 
> Not yet, at least on the new compatible introduction, I need an ack from
> DT folks.
> 
I noticed that but the usual 2 weeks period to get ack is over I guess ;-)
The DT part is really trivial as well but I let you decide.

> I am happy with the patches though and have tested them as well, In case
> I do not get an ack from 2/2 in time, I can at least send 1/2 for
> inclusion after my first gpio pull request to ARM-SoC gets pulled.
>
Would be great to get both of them but if not both at least 1/2.

Regards,
Santosh
 

Re: [PATCH v3 0/2] gpio: davinci: reuse for keystone arch

[Sekhar Nori]

On Wednesday 08 January 2014 07:38 PM, Santosh Shilimkar wrote:
> On Tuesday 07 January 2014 11:06 PM, Sekhar Nori wrote:
>> On Tuesday 07 January 2014 11:22 PM, Santosh Shilimkar wrote:
>>> Sekhar,
>>>
>>> On Tuesday 24 December 2013 06:41 AM, Grygorii Strashko wrote:
>>>> This series is intended to update Davinci GPIO driver and reuse
>>>> it for Keystone SoCs, because Keystone uses the similar GPIO IP like Davinci.
>>>> Keystone GPIO IP: supports:
>>>> - up to 32 GPIO lines;
>>>> - only unbanked irqs;
>>>>
>>>> See Documentation:
>>>> Keystone - http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf
>>>>
>>>> This series based on:
>>>> https://git.kernel.org/cgit/linux/kernel/git/nsekhar/linux-davinci.git/log/?h=v3.14/gpio
>>>>
>>>> Changes in v3:
>>>> - fixed code, changed by mistake; fixed sparse warning 
>>>> Changes in v2:
>>>> - minor comments applied, no functional changes
>>>>
>>>> v2: https://lkml.org/lkml/2013/12/18/135
>>>> v1: https://lkml.org/lkml/2013/12/12/366
>>>>
>>>> Cc: Linus Walleij <linus.walleij@linaro.org>
>>>> Cc: Alexandre Courbot <gnurou@gmail.com>
>>>> Cc: Sekhar Nori <nsekhar@ti.com>
>>>> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
>>>>
>>>> Grygorii Strashko (2):
>>>>   gpio: davinci: don't create irq_domain in case of unbanked irqs
>>>>   gpio: davinci: reuse for Keystone SoC
>>>>
>>>>  .../devicetree/bindings/gpio/gpio-davinci.txt      |    4 +-
>>>>  drivers/gpio/gpio-davinci.c                        |   82 ++++++++++++++------
>>>>  2 files changed, 61 insertions(+), 25 deletions(-)
>>>>
>>> Have you picked up the $subject series in your queue ?
>>
>> Not yet, at least on the new compatible introduction, I need an ack from
>> DT folks.
>>
> I noticed that but the usual 2 weeks period to get ack is over I guess ;-)
> The DT part is really trivial as well but I let you decide.

I just realize that Rob's e-mail address bounces. I have added his
updated address now and hopefully he will see this to provide his ack.

Rob,

We need your ack on 2/2 of this series. If you do not have the patch, I
can forward it to you.

> 
>> I am happy with the patches though and have tested them as well, In case
>> I do not get an ack from 2/2 in time, I can at least send 1/2 for
>> inclusion after my first gpio pull request to ARM-SoC gets pulled.
>>
> Would be great to get both of them but if not both at least 1/2.

I had already sent it with my first pull request. Hmph. Everything
except 2/2 of tis series should be in linux-next now.

Thanks,
Sekhar

Re: [PATCH v3 0/2] gpio: davinci: reuse for keystone arch

[Santosh Shilimkar]

On Thursday 09 January 2014 05:31 AM, Sekhar Nori wrote:
> On Wednesday 08 January 2014 07:38 PM, Santosh Shilimkar wrote:
>> On Tuesday 07 January 2014 11:06 PM, Sekhar Nori wrote:
>>> On Tuesday 07 January 2014 11:22 PM, Santosh Shilimkar wrote:
>>>> Sekhar,
>>>>
>>>> On Tuesday 24 December 2013 06:41 AM, Grygorii Strashko wrote:
>>>>> This series is intended to update Davinci GPIO driver and reuse
>>>>> it for Keystone SoCs, because Keystone uses the similar GPIO IP like Davinci.
>>>>> Keystone GPIO IP: supports:
>>>>> - up to 32 GPIO lines;
>>>>> - only unbanked irqs;
>>>>>
>>>>> See Documentation:
>>>>> Keystone - http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf
>>>>>
>>>>> This series based on:
>>>>> https://git.kernel.org/cgit/linux/kernel/git/nsekhar/linux-davinci.git/log/?h=v3.14/gpio
>>>>>
>>>>> Changes in v3:
>>>>> - fixed code, changed by mistake; fixed sparse warning 
>>>>> Changes in v2:
>>>>> - minor comments applied, no functional changes
>>>>>
>>>>> v2: https://lkml.org/lkml/2013/12/18/135
>>>>> v1: https://lkml.org/lkml/2013/12/12/366
>>>>>
>>>>> Cc: Linus Walleij <linus.walleij@linaro.org>
>>>>> Cc: Alexandre Courbot <gnurou@gmail.com>
>>>>> Cc: Sekhar Nori <nsekhar@ti.com>
>>>>> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
>>>>>
>>>>> Grygorii Strashko (2):
>>>>>   gpio: davinci: don't create irq_domain in case of unbanked irqs
>>>>>   gpio: davinci: reuse for Keystone SoC
>>>>>
>>>>>  .../devicetree/bindings/gpio/gpio-davinci.txt      |    4 +-
>>>>>  drivers/gpio/gpio-davinci.c                        |   82 ++++++++++++++------
>>>>>  2 files changed, 61 insertions(+), 25 deletions(-)
>>>>>
>>>> Have you picked up the $subject series in your queue ?
>>>
>>> Not yet, at least on the new compatible introduction, I need an ack from
>>> DT folks.
>>>
>> I noticed that but the usual 2 weeks period to get ack is over I guess ;-)
>> The DT part is really trivial as well but I let you decide.
> 
> I just realize that Rob's e-mail address bounces. I have added his
> updated address now and hopefully he will see this to provide his ack.
> 
> Rob,
> 
> We need your ack on 2/2 of this series. If you do not have the patch, I
> can forward it to you.
> 
>>
>>> I am happy with the patches though and have tested them as well, In case
>>> I do not get an ack from 2/2 in time, I can at least send 1/2 for
>>> inclusion after my first gpio pull request to ARM-SoC gets pulled.
>>>
>> Would be great to get both of them but if not both at least 1/2.
> 
> I had already sent it with my first pull request. Hmph. Everything
> except 2/2 of tis series should be in linux-next now.
> 
Thanks !!