Re: [PATCH] clocksource: exynos4: Fix wrong bit operation in exynos4_mct_write()

[jonghwa3.lee@samsung.com]

On 2014년 02월 04일 22:01, Kyungmin Park wrote:

> 
> 
> On Tuesday, February 4, 2014, Jonghwa Lee <jonghwa3.lee@samsung.com
> <mailto:jonghwa3.lee@samsung.com>> wrote:
> 
>     There was a faulty bit operation during checking offset in exynos4_mct_write().
>     This patch fixes it correctly.
> 
> What's the issue? What's happened with current code? 


Whether it would be applied or not, current code looks working fine. Because
those things are just needed to confirm writing to certain register. The
technical reference manual recommends users to check write status register for
some specified registers, e.g. control register. However current code always
skip checking write status even we access the registers required. It will just
executed writing operation only and leave write status uncleared.

Thanks,
Jonghwa

> 
> Thank you,
> Kyungmin Park
> 
> 
>     Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com <javascript:;>>
>     Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com <javascript:;>>
>     ---
>      drivers/clocksource/exynos_mct.c |    4 ++--
>      1 file changed, 2 insertions(+), 2 deletions(-)
> 
>     diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
>     index 62b0de6..e60b019 100644
>     --- a/drivers/clocksource/exynos_mct.c
>     +++ b/drivers/clocksource/exynos_mct.c
>     @@ -94,8 +94,8 @@ static void exynos4_mct_write(unsigned int value, unsigned
>     long offset)
>             __raw_writel(value, reg_base + offset);
> 
>             if (likely(offset >= EXYNOS4_MCT_L_BASE(0))) {
>     -               stat_addr = (offset & ~EXYNOS4_MCT_L_MASK) + MCT_L_WSTAT_OFFSET;
>     -               switch (offset & EXYNOS4_MCT_L_MASK) {
>     +               stat_addr = (offset & EXYNOS4_MCT_L_MASK) + MCT_L_WSTAT_OFFSET;
>     +               switch (offset & ~EXYNOS4_MCT_L_MASK) {
>                     case MCT_L_TCON_OFFSET:
>                             mask = 1 << 3;          /* L_TCON write status */
>                             break;
>     --
>     1.7.9.5
> 
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