From: Stephen Warren <swarren@wwwdotorg.org>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Rob Landley <rob@landley.net>,
Thierry Reding <thierry.reding@gmail.com>,
Grant Likely <grant.likely@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Danny Huang <dahuang@nvidia.com>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v3 3/6] misc: fuse: Add efuse driver for Tegra
Date: Thu, 06 Feb 2014 09:45:53 -0700 [thread overview]
Message-ID: <52F3BC41.1030901@wwwdotorg.org> (raw)
In-Reply-To: <20140206091114.GK19389@tbergstrom-lnx.Nvidia.com>
On 02/06/2014 02:11 AM, Peter De Schrijver wrote:
> On Wed, Feb 05, 2014 at 08:15:46PM +0100, Stephen Warren wrote:
>> On 01/28/2014 04:36 PM, Peter De Schrijver wrote:
>>> Implement fuse driver for Tegra20, Tegra30, Tegra114 and Tegra124.
>>> diff --git a/Documentation/ABI/testing/sysfs-driver-tegra-fuse b/Documentation/ABI/testing/sysfs-driver-tegra-fuse
>>> +What: /sys/devices/*/<our-device>/fuse
>>> +Date: December 2013
>>> +Contact: Peter De Schrijver <pdeschrijver@nvidia.com>
>>> +Description: read-only access to the efuses on Tegra20, Tegra30, Tegra114
>>> + and Tegra124 SoC's from NVIDIA. The efuses contain write once
>>> + data programmed at the factory.
>>> +Users: any user space application which wants to read the efuses on
>>> + Tegra SoC's
>>
>> Surely this file should describe the format of the file, since that's
>> part of the ABI too, right?
>>
>
> Part of the fuse data is ODM defined so possibly board specific.
I didn't mean the interpretation of which fuses mean what semantically,
but rather the data format of the file. IIRC looking at the code, it's
just a binary dump of the fuses, but it might be worth spelling out that
it's a byte-oriented binary file, with fuse 0 in bit 0 of byte 0 etc.?
next prev parent reply other threads:[~2014-02-06 16:46 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-28 23:36 [PATCH v3 0/6] efuse driver for Tegra Peter De Schrijver
2014-01-28 23:36 ` [PATCH v3 1/6] ARM: tegra: export apb dma readl/writel Peter De Schrijver
2014-01-28 23:36 ` [PATCH v3 2/6] ARM: tegra: Add chipid, revision and fuse init Peter De Schrijver
2014-02-05 18:40 ` Stephen Warren
2014-01-28 23:36 ` [PATCH v3 3/6] misc: fuse: Add efuse driver for Tegra Peter De Schrijver
2014-01-29 2:26 ` Jim Lin
2014-02-03 14:15 ` Peter De Schrijver
2014-02-05 10:26 ` Jim Lin
2014-02-05 19:15 ` Stephen Warren
2014-02-06 9:11 ` Peter De Schrijver
2014-02-06 16:45 ` Stephen Warren [this message]
2014-01-28 23:36 ` [PATCH v3 4/6] ARM: tegra: Add efuse bindings Peter De Schrijver
2014-01-29 17:18 ` Rob Herring
2014-02-05 18:42 ` Stephen Warren
2014-01-28 23:36 ` [PATCH v3 5/6] misc: enable fuse drivers Peter De Schrijver
2014-02-05 18:44 ` Stephen Warren
2014-01-28 23:36 ` [PATCH v3 6/6] ARM: tegra: remove fuse files from mach-tegra Peter De Schrijver
2014-02-05 18:45 ` Stephen Warren
2014-01-29 15:00 ` [PATCH v3 0/6] efuse driver for Tegra Paul Gortmaker
2014-01-30 9:45 ` Peter De Schrijver
2014-02-05 18:49 ` Stephen Warren
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