From: "Yan, Zheng" <zheng.z.yan@intel.com>
To: Stephane Eranian <eranian@google.com>, linux-kernel@vger.kernel.org
Cc: peterz@infradead.org, mingo@elte.hu, acme@redhat.com, ak@linux.intel.com
Subject: Re: [PATCH v1 03/10] perf/x86/uncore: do not assume PCI fixed ctrs have more than 32 bits
Date: Mon, 10 Feb 2014 11:11:42 +0800 [thread overview]
Message-ID: <52F8436E.8090907@intel.com> (raw)
In-Reply-To: <1391432142-18723-4-git-send-email-eranian@google.com>
On 02/03/2014 08:55 PM, Stephane Eranian wrote:
> The current code assumes all PCI fixed counters implement more than
> 32-bit hardware counters. The actual width is then round up to 64 to
> enable base + 8 * idx calculations.
>
> Not all PMUs necessarily implement counters with more than 32-bits.
> The patch makes the uncore_pci_perf_ctr() function dynamically
> determine the actual bits width of a pci perf counter.
>
> This patch paves the way for handling more than one uncore fixed
> counter per PMU box.
>
> Signed-off-by: Stephane Eranian <eranian@google.com>
> ---
> arch/x86/kernel/cpu/perf_event_intel_uncore.h | 31 ++++++++++++++++---------
> 1 file changed, 20 insertions(+), 11 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.h b/arch/x86/kernel/cpu/perf_event_intel_uncore.h
> index 77dc9a5..f5549cf 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel_uncore.h
> +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.h
> @@ -548,10 +548,29 @@ unsigned uncore_pci_event_ctl(struct intel_uncore_box *box, int idx)
> return idx * 4 + box->pmu->type->event_ctl;
> }
>
> +static inline int uncore_perf_ctr_bits(struct intel_uncore_box *box)
> +{
> + return box->pmu->type->perf_ctr_bits;
> +}
> +
> +static inline int uncore_fixed_ctr_bits(struct intel_uncore_box *box)
> +{
> + return box->pmu->type->fixed_ctr_bits;
> +}
> +
> static inline
> unsigned uncore_pci_perf_ctr(struct intel_uncore_box *box, int idx)
> {
> - return idx * 8 + box->pmu->type->perf_ctr;
> + int bits, bytes;
> +
> + if (idx == UNCORE_PMC_IDX_FIXED)
> + bits = uncore_fixed_ctr_bits(box);
> + else
> + bits = uncore_perf_ctr_bits(box);
> +
> + bytes = round_up(bits, 8);
should this be "round_up(bits, 32) / 8" ?
Regards
Yan, Zheng
> +
> + return idx * bytes + box->pmu->type->perf_ctr;
> }
>
> static inline unsigned uncore_msr_box_offset(struct intel_uncore_box *box)
> @@ -633,16 +652,6 @@ unsigned uncore_perf_ctr(struct intel_uncore_box *box, int idx)
> return uncore_msr_perf_ctr(box, idx);
> }
>
> -static inline int uncore_perf_ctr_bits(struct intel_uncore_box *box)
> -{
> - return box->pmu->type->perf_ctr_bits;
> -}
> -
> -static inline int uncore_fixed_ctr_bits(struct intel_uncore_box *box)
> -{
> - return box->pmu->type->fixed_ctr_bits;
> -}
> -
> static inline int uncore_num_counters(struct intel_uncore_box *box)
> {
> return box->pmu->type->num_counters;
>
next prev parent reply other threads:[~2014-02-10 3:11 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-03 12:55 [PATCH v1 00/10] perf/x86/uncore: add support for SNB/IVB/HSW integrated memory controller PMU Stephane Eranian
2014-02-03 12:55 ` [PATCH v1 01/10] perf/x86/uncore: fix initialization of cpumask Stephane Eranian
2014-02-10 2:49 ` Yan, Zheng
2014-02-11 11:12 ` Stephane Eranian
2014-02-03 12:55 ` [PATCH v1 02/10] perf/x86/uncore: add ability to customize pmu callbacks Stephane Eranian
2014-02-03 12:55 ` [PATCH v1 03/10] perf/x86/uncore: do not assume PCI fixed ctrs have more than 32 bits Stephane Eranian
2014-02-10 3:11 ` Yan, Zheng [this message]
2014-02-11 13:54 ` Stephane Eranian
2014-02-03 12:55 ` [PATCH v1 04/10] perf/x86/uncore: add PCI ids for SNB/IVB/HSW IMC Stephane Eranian
2014-02-03 12:55 ` [PATCH v1 05/10] perf/x86/uncore: make hrtimer timeout configurable per box Stephane Eranian
2014-02-03 12:55 ` [PATCH v1 06/10] perf/x86/uncore: move uncore_event_to_box() and uncore_pmu_to_box() Stephane Eranian
2014-02-03 12:55 ` [PATCH v1 07/10] perf/x86/uncore: allow more than one fixed counter per box Stephane Eranian
2014-02-10 3:17 ` Yan, Zheng
2014-02-03 12:55 ` [PATCH v1 08/10] perf/x86/uncore: add SNB/IVB/HSW client uncore memory controller support Stephane Eranian
2014-02-10 6:27 ` Yan, Zheng
2014-02-03 12:55 ` [PATCH v1 09/10] perf/x86/uncore: add hrtimer to SNB uncore IMC PMU Stephane Eranian
2014-02-10 6:04 ` Yan, Zheng
2014-02-03 12:55 ` [PATCH v1 10/10] perf/x86/uncore: use MiB unit for events for SNB/IVB/HSW IMC Stephane Eranian
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