[PATCH v2] pinctrl: sh-pfc: r8a7790: Add QSPI pin groups

[PATCH v2] pinctrl: sh-pfc: r8a7790: Add QSPI pin groups

[Geert Uytterhoeven]

A QSPI function set consists of 3 groups:
  - qspi_ctrl (2 control wires)
  - qspi_data2 (2 data wires, for Single/Dual SPI)
  - qspi_data4 (4 data wires, for Quad SPI)

Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
v2: Insert line at correct position in pinmux_functions[]

 drivers/pinctrl/sh-pfc/pfc-r8a7790.c |   33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index c381ae63c508..2ca319f15d31 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -2389,6 +2389,29 @@ static const unsigned int msiof3_tx_pins[] = {
 static const unsigned int msiof3_tx_mux[] = {
 	MSIOF3_TXD_MARK,
 };
+/* - QSPI ------------------------------------------------------------------- */
+static const unsigned int qspi_ctrl_pins[] = {
+	/* SPCLK, SSL */
+	RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 9),
+};
+static const unsigned int qspi_ctrl_mux[] = {
+	SPCLK_MARK, SSL_MARK,
+};
+static const unsigned int qspi_data2_pins[] = {
+	/* MOSI_IO0, MISO_IO1 */
+	RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6),
+};
+static const unsigned int qspi_data2_mux[] = {
+	MOSI_IO0_MARK, MISO_IO1_MARK,
+};
+static const unsigned int qspi_data4_pins[] = {
+	/* MOSI_IO0, MISO_IO1, IO2, IO3 */
+	RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6), RCAR_GP_PIN(1, 7),
+	RCAR_GP_PIN(1, 8),
+};
+static const unsigned int qspi_data4_mux[] = {
+	MOSI_IO0_MARK, MISO_IO1_MARK, IO2_MARK, IO3_MARK,
+};
 /* - SCIF0 ------------------------------------------------------------------ */
 static const unsigned int scif0_data_pins[] = {
 	/* RX, TX */
@@ -3671,6 +3694,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
 	SH_PFC_PIN_GROUP(msiof3_ss2),
 	SH_PFC_PIN_GROUP(msiof3_rx),
 	SH_PFC_PIN_GROUP(msiof3_tx),
+	SH_PFC_PIN_GROUP(qspi_ctrl),
+	SH_PFC_PIN_GROUP(qspi_data2),
+	SH_PFC_PIN_GROUP(qspi_data4),
 	SH_PFC_PIN_GROUP(scif0_data),
 	SH_PFC_PIN_GROUP(scif0_clk),
 	SH_PFC_PIN_GROUP(scif0_ctrl),
@@ -3970,6 +3996,12 @@ static const char * const msiof3_groups[] = {
 	"msiof3_tx",
 };
 
+static const char * const qspi_groups[] = {
+	"qspi_ctrl",
+	"qspi_data2",
+	"qspi_data4",
+};
+
 static const char * const scif0_groups[] = {
 	"scif0_data",
 	"scif0_clk",
@@ -4213,6 +4245,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
 	SH_PFC_FUNCTION(msiof1),
 	SH_PFC_FUNCTION(msiof2),
 	SH_PFC_FUNCTION(msiof3),
+	SH_PFC_FUNCTION(qspi),
 	SH_PFC_FUNCTION(scif0),
 	SH_PFC_FUNCTION(scif1),
 	SH_PFC_FUNCTION(scif2),
-- 
1.7.9.5

Re: [PATCH v2] pinctrl: sh-pfc: r8a7790: Add QSPI pin groups

[Ben Dooks]

On 10/02/14 13:00, Geert Uytterhoeven wrote:
> A QSPI function set consists of 3 groups:
>    - qspi_ctrl (2 control wires)
>    - qspi_data2 (2 data wires, for Single/Dual SPI)
>    - qspi_data4 (4 data wires, for Quad SPI)

Hi, do you have a branch with all your SPI/QSPI work on that we
could have a test with please?


-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

Re: [PATCH v2] pinctrl: sh-pfc: r8a7790: Add QSPI pin groups

[Geert Uytterhoeven]

Hi Ben,

On Mon, Feb 10, 2014 at 7:36 PM, Ben Dooks <ben.dooks@codethink.co.uk> wrote:
> On 10/02/14 13:00, Geert Uytterhoeven wrote:
>>
>> A QSPI function set consists of 3 groups:
>>    - qspi_ctrl (2 control wires)
>>    - qspi_data2 (2 data wires, for Single/Dual SPI)
>>    - qspi_data4 (4 data wires, for Quad SPI)
>
>
> Hi, do you have a branch with all your SPI/QSPI work on that we
> could have a test with please?

https://git.kernel.org/cgit/linux/kernel/git/geert/linux-m68k.git/log/?h=rcar-spi

This is based on renesas-devel-v3.14-rc1-20140207 and spi/for-next,
with accepted pinctrl and clock fixes, and the patches I sent out recently.
I left out the r7s72100/genmai stuff, as that depends on more out-of-tree
patches, and I think you're interested in Lager only?

Have fun!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2] pinctrl: sh-pfc: r8a7790: Add QSPI pin groups

[Linus Walleij]

On Mon, Feb 10, 2014 at 2:00 PM, Geert Uytterhoeven
<geert+renesas@linux-m68k.org> wrote:

> A QSPI function set consists of 3 groups:
>   - qspi_ctrl (2 control wires)
>   - qspi_data2 (2 data wires, for Single/Dual SPI)
>   - qspi_data4 (4 data wires, for Quad SPI)
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
> v2: Insert line at correct position in pinmux_functions[]

Patch applied, sorry for the delay.

Yours,
Linus Walleij