From: Jiri Slaby <jirislaby@kernel.org>
To: Claudiu <claudiu.beznea@tuxon.dev>,
geert+renesas@glider.be, magnus.damm@gmail.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, mturquette@baylibre.com,
sboyd@kernel.org, gregkh@linuxfoundation.org,
p.zabel@pengutronix.de, g.liakhovetski@gmx.de,
lethal@linux-sh.org
Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-serial@vger.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>,
stable@vger.kernel.org
Subject: Re: [PATCH v2 2/8] serial: sh-sci: Check if TX data was written to device in .tx_empty()
Date: Fri, 8 Nov 2024 11:57:22 +0100 [thread overview]
Message-ID: <530f4a8e-b71a-4db1-a2cc-df1fcfa132ec@kernel.org> (raw)
In-Reply-To: <20241108100513.2814957-3-claudiu.beznea.uj@bp.renesas.com>
On 08. 11. 24, 11:05, Claudiu wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
> On the Renesas RZ/G3S, when doing suspend to RAM, the uart_suspend_port()
> is called. The uart_suspend_port() calls 3 times the
> struct uart_port::ops::tx_empty() before shutting down the port.
>
> According to the documentation, the struct uart_port::ops::tx_empty()
> API tests whether the transmitter FIFO and shifter for the port is
> empty.
>
> The Renesas RZ/G3S SCIFA IP reports the number of data units stored in the
> transmit FIFO through the FDR (FIFO Data Count Register). The data units
> in the FIFOs are written in the shift register and transmitted from there.
> The TEND bit in the Serial Status Register reports if the data was
> transmitted from the shift register.
>
> In the previous code, in the tx_empty() API implemented by the sh-sci
> driver, it is considered that the TX is empty if the hardware reports the
> TEND bit set and the number of data units in the FIFO is zero.
>
> According to the HW manual, the TEND bit has the following meaning:
>
> 0: Transmission is in the waiting state or in progress.
> 1: Transmission is completed.
>
> It has been noticed that when opening the serial device w/o using it and
> then switch to a power saving mode, the tx_empty() call in the
> uart_port_suspend() function fails, leading to the "Unable to drain
> transmitter" message being printed on the console. This is because the
> TEND=0 if nothing has been transmitted and the FIFOs are empty. As the
> TEND=0 has double meaning (waiting state, in progress) we can't
> determined the scenario described above.
>
> Add a software workaround for this. This sets a variable if any data has
> been sent on the serial console (when using PIO) or if the DMA callback has
> been called (meaning something has been transmitted).
>
> Fixes: 73a19e4c0301 ("serial: sh-sci: Add DMA support.")
> Cc: stable@vger.kernel.org
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
>
> Changes in v2:
> - use bool type instead of atomic_t
>
> drivers/tty/serial/sh-sci.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
> index 136e0c257af1..65514d37bfe2 100644
> --- a/drivers/tty/serial/sh-sci.c
> +++ b/drivers/tty/serial/sh-sci.c
> @@ -157,6 +157,7 @@ struct sci_port {
>
> bool has_rtscts;
> bool autorts;
> + bool first_time_tx;
This is a misnomer. It suggests to be set only during the first TX. What
about ::did_tx, ::performed_tx, ::transmitted, or alike?
> @@ -885,6 +887,7 @@ static void sci_transmit_chars(struct uart_port *port)
> }
>
> sci_serial_out(port, SCxTDR, c);
> + s->first_time_tx = true;
>
> port->icount.tx++;
> } while (--count > 0);
> @@ -1241,6 +1244,8 @@ static void sci_dma_tx_complete(void *arg)
> if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS)
> uart_write_wakeup(port);
>
> + s->first_time_tx = true;
This is too late IMO. The first in-flight dma won't be accounted in
sci_tx_empty(). From DMA submit up to now.
> @@ -2076,6 +2081,10 @@ static unsigned int sci_tx_empty(struct uart_port *port)
> {
> unsigned short status = sci_serial_in(port, SCxSR);
> unsigned short in_tx_fifo = sci_txfill(port);
> + struct sci_port *s = to_sci_port(port);
> +
> + if (!s->first_time_tx)
> + return TIOCSER_TEMT;
So perhaps check if there is a TX DMA running here too?
>
> return (status & SCxSR_TEND(port)) && !in_tx_fifo ? TIOCSER_TEMT : 0;
> }
thanks,
--
js
suse labs
next prev parent reply other threads:[~2024-11-08 10:57 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-08 10:05 [PATCH v2 0/8] Add support for the rest of Renesas RZ/G3S serial interfaces Claudiu
2024-11-08 10:05 ` [PATCH v2 1/8] clk: renesas: r9a08g045: Add clock, reset and power domain for the remaining SCIFs Claudiu
2024-11-08 10:05 ` [PATCH v2 2/8] serial: sh-sci: Check if TX data was written to device in .tx_empty() Claudiu
2024-11-08 10:57 ` Jiri Slaby [this message]
2024-11-08 12:19 ` Claudiu Beznea
2024-11-12 8:35 ` Claudiu Beznea
2024-11-14 6:26 ` Jiri Slaby
2024-11-14 6:29 ` Jiri Slaby
2024-11-14 8:11 ` Claudiu Beznea
2024-11-08 10:05 ` [PATCH v2 3/8] serial: sh-sci: Update the suspend/resume support Claudiu
2024-11-08 10:05 ` [PATCH v2 4/8] arm64: dts: renesas: r9a08g045: Add the remaining SCIF interfaces Claudiu
2024-11-08 10:05 ` [PATCH v2 5/8] arm64: dts: renesas: rzg3s-smarc: Fix the debug serial alias Claudiu
2024-11-08 10:05 ` [PATCH v2 6/8] arm64: dts: renesas: rzg3s-smarc-switches: Add a header to describe different switches Claudiu
2024-11-08 10:05 ` [PATCH v2 7/8] arm64: dts: renesas: rzg3s-smarc: Enable SCIF3 Claudiu
2024-11-08 10:05 ` [PATCH v2 8/8] arm64: dts: renesas: r9a08g045s33-smarc-pmod: Add overlay for SCIF1 Claudiu
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