Re: [PATCH 4/5] ARM: berlin/dt: add cpupll and syspll support to BG2CD

Sebastian Hesselbarth
2014-03-21T12:07:49Z

On 03/21/2014 12:43 PM, Alexandre Belloni wrote:
> This also moves the clocks from the clocks container node to the root.

Please leave a word on the original intention of the patch here, too.

> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
> arch/arm/boot/dts/berlin2cd.dtsi | 56 ++++++++++++++++++++++++++++------------
> 1 file changed, 39 insertions(+), 17 deletions(-)
>
> diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
> index 094968c27533..c84013c1597c 100644
> --- a/arch/arm/boot/dts/berlin2cd.dtsi
> +++ b/arch/arm/boot/dts/berlin2cd.dtsi
> @@ -30,24 +30,46 @@
> };
> };
>
> - clocks {
> - smclk: sysmgr-clock {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <25000000>;
> - };
> + smclk: sysmgr-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <25000000>;
> + };
>
> - cfgclk: cfg-clock {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <75000000>;
> - };
> + cfgclk: cfg-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <75000000>;
> + };
>
> - sysclk: system-clock {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <300000000>;
> - };
> + syspll: syspll {

syspll: pll@ea0014 and sort it in SoC nodes.

> + compatible = "marvell,berlin2-pll";
> + clocks = <&smclk>;
> + #clock-cells = <0>;
> + reg = <0xf7ea0014 8>;
> + };
> +
> + cpupll: cpupll {

ditto.

> + compatible = "marvell,berlin2-pll";
> + clocks = <&smclk>;
> + #clock-cells = <0>;
> + reg = <0xf7ea003c 8>;
> + };
> +
> + cpuclk: cpu-clock {
> + compatible = "fixed-factor-clock";
> + clocks = <&cpupll>;
> + #clock-cells = <0>;
> + clock-div = <1>;
> + clock-mult = <1>;

Same comment about cpuclk to cpupll relation.

> + };
> +
> + twdclk: twdclk {
> + compatible = "fixed-factor-clock";
> + #clock-cells = <0>;
> + clocks = <&cpuclk>;
> + clock-mult = <1>;
> + clock-div = <3>;
> };
>
> soc {
> @@ -76,7 +98,7 @@
> compatible = "arm,cortex-a9-twd-timer";
> reg = <0xad0600 0x20>;
> interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&sysclk>;
> + clocks = <&twdclk>;
> };
>
> apb@e80000 {
>