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From: Chanwoo Choi <cw00.choi@samsung.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: "kgene.kim@samsung.com" <kgene.kim@samsung.com>,
	"t.figa@samsung.com" <t.figa@samsung.com>,
	"linux-samsung-soc@vger.kernel.org" 
	<linux-samsung-soc@vger.kernel.org>,
	"hyunhee.kim@samsung.com" <hyunhee.kim@samsung.com>,
	"sw0312.kim@samsung.com" <sw0312.kim@samsung.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"yj44.cho@samsung.com" <yj44.cho@samsung.com>,
	"inki.dae@samsung.com" <inki.dae@samsung.com>,
	"kyungmin.park@samsung.com" <kyungmin.park@samsung.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 06/27] ARM: EXYNOS:: Enter a15 lowpower mode for Exynos3250 based on Cortex-a7
Date: Fri, 11 Apr 2014 09:36:46 +0900	[thread overview]
Message-ID: <5347391E.7010201@samsung.com> (raw)
In-Reply-To: <87mwft1j7f.fsf@approximate.cambridge.arm.com>

On 04/10/2014 09:07 PM, Marc Zyngier wrote:
> On Thu, Apr 10 2014 at 11:56:33 am BST, Chanwoo Choi <cw00.choi@samsung.com> wrote:
>> On 04/10/2014 06:51 PM, Marc Zyngier wrote:
>>> On Thu, Apr 10 2014 at 10:28:23 am BST, Chanwoo Choi <cw00.choi@samsung.com> wrote:
>>>> This patch decide proper lowpower mode of either a15 or a9 according to own ID
>>>> from Main ID register.
>>>>
>>>> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
>>>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>>>> ---
>>>>  arch/arm/mach-exynos/hotplug.c | 13 ++++++++++---
>>>>  1 file changed, 10 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
>>>> index 5eead53..36d3db6 100644
>>>> --- a/arch/arm/mach-exynos/hotplug.c
>>>> +++ b/arch/arm/mach-exynos/hotplug.c
>>>> @@ -135,13 +135,20 @@ void __ref exynos_cpu_die(unsigned int cpu)
>>>>  	int primary_part = 0;
>>>>  
>>>>  	/*
>>>> -	 * we're ready for shutdown now, so do it.
>>>> -	 * Exynos4 is A9 based while Exynos5 is A15; check the CPU part
>>>> +	 * we're ready for shutdown now, so do it. Exynos4 is A9 based
>>>> +	 * while Exynos5 is A15/Exynos7 is A7; check the CPU part
>>>>  	 * number by reading the Main ID register and then perform the
>>>>  	 * appropriate sequence for entering low power.
>>>>  	 */
>>>>  	asm("mrc p15, 0, %0, c0, c0, 0" : "=r"(primary_part) : : "cc");
>>>
>>> While you're touching that code, how about using:
>>>
>>>       primary_part = read_cpuid(CPUID_ID);
>>
>> Or, 
>> I suggest read_cpuid_part_number() instead of assembler directly.
>>
>> 	primary_part = read_cpuid_part_number();
> 
> Yup, even better.
> 
>>>
>>>> -	if ((primary_part & 0xfff0) == 0xc0f0)
>>>> +
>>>> +	/*
>>>> +	 * Main ID register of Cortex series
>>>> +	 * - Cortex-a7  : 0x410F_C07x
>>>> +	 * - Cortex-a15 : 0x410F_C0Fx
>>>> +	 */
>>>> +	primary_part = primary_part & 0xfff0;
>>>> +	if (primary_part == 0xc0f0 || primary_part == 0xc070)
>>>
>>> ARM_CPU_PART_CORTEX_A15, ARM_CPU_PART_CORTEX_A7
>>
>> OK I'll use this defined constant as following:
>>
>> 	switch (primary_part)
>> 	case ARM_CPU_PART_CORTEX_A7:
>> 	case ARM_CPU_PART_CORTEX_A15:
>> 		cpu_enter_lowpower_a15();
>> 		break;
>> 	default:
>> 		cpu_enter_lowpower_a9();
>> 		break;
>> 	}
> 
> Looks good.
> 

Thanks for your review.

Best Regards,
Chanwoo Choi


  reply	other threads:[~2014-04-11  0:36 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-10  9:28 [PATCH 00/27] Support new Exynos3250 SoC based on Cortex-A7 dual core Chanwoo Choi
2014-04-10  9:28 ` [PATCH 01/27] ARM: EXYNOS: Add Exynos3250 SoC ID Chanwoo Choi
2014-04-10  9:43   ` Arnd Bergmann
2014-04-11  1:31     ` Chanwoo Choi
2014-04-14  6:20       ` Chanwoo Choi
2014-04-10  9:28 ` [PATCH 02/27] ARM: EXYNOS: Add IO mapping for non-secure SYSRAM of Exynos3250 Chanwoo Choi
2014-04-10  9:45   ` Arnd Bergmann
2014-04-10  9:57     ` Chanho Park
2014-04-10  9:28 ` [PATCH 03/27] ARM: EXYNOS: Add IO mapping for PMU " Chanwoo Choi
2014-04-10  9:46   ` Arnd Bergmann
2014-04-14  6:04     ` Chanwoo Choi
2014-04-10  9:28 ` [PATCH 04/27] ARM: EXYNOS: Support secondary CPU boot of Exynos4212 Chanwoo Choi
2014-04-10  9:28 ` [PATCH 05/27] ARM: EXYNOS: Support secondary CPU boot of Exynos3250 Chanwoo Choi
2014-04-10  9:28 ` [PATCH 06/27] ARM: EXYNOS:: Enter a15 lowpower mode for Exynos3250 based on Cortex-a7 Chanwoo Choi
2014-04-10  9:40   ` Arnd Bergmann
2014-04-10 10:38     ` Chanwoo Choi
2014-04-10  9:51   ` Marc Zyngier
2014-04-10 10:56     ` Chanwoo Choi
2014-04-10 12:07       ` Marc Zyngier
2014-04-11  0:36         ` Chanwoo Choi [this message]
2014-04-10  9:28 ` [PATCH 07/27] irqchip: Declare cortex-a7's irqchip to initialize gic from dt Chanwoo Choi
2014-04-10 10:04   ` Marc Zyngier
2014-04-10 10:09     ` armdev
2014-04-10 10:21       ` Marc Zyngier
2014-04-10 10:30         ` armdev
2014-04-10 10:41           ` Marc Zyngier
2014-04-10 10:42             ` armdev
2014-04-10 10:50               ` Marc Zyngier
2014-04-10 10:37     ` Chanho Park
2014-04-10 10:46       ` Marc Zyngier
2014-04-10 13:02     ` Mark Rutland
2014-04-10  9:28 ` [PATCH 08/27] pinctrl: exynos: Add driver data for Exynos3250 Chanwoo Choi
2014-04-10 18:42   ` Linus Walleij
2014-04-10 19:17     ` Tomasz Figa
2014-04-11  0:44       ` Chanwoo Choi
2014-04-10  9:32 ` [PATCH 00/27] Support new Exynos3250 SoC based on Cortex-A7 dual core Chanwoo Choi
  -- strict thread matches above, loose matches on Subject: below --
2014-04-10  9:37 Chanwoo Choi
2014-04-10  9:37 ` [PATCH 06/27] ARM: EXYNOS:: Enter a15 lowpower mode for Exynos3250 based on Cortex-a7 Chanwoo Choi

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