From: Stephen Warren <swarren@wwwdotorg.org>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Russell King <linux@arm.linux.org.uk>,
Thierry Reding <thierry.reding@gmail.com>,
Andrew Morton <akpm@linux-foundation.org>,
Linus Walleij <linus.walleij@linaro.org>,
Wolfram Sang <wsa@the-dreams.de>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v7 3/5] misc: fuse: Add efuse driver for Tegra
Date: Thu, 05 Jun 2014 16:54:00 -0600 [thread overview]
Message-ID: <5390F508.8080104@wwwdotorg.org> (raw)
In-Reply-To: <20140605220946.GP5961@tbergstrom-lnx.Nvidia.com>
On 06/05/2014 04:09 PM, Peter De Schrijver wrote:
> On Thu, Jun 05, 2014 at 08:37:26PM +0200, Stephen Warren wrote:
>> On 06/05/2014 07:09 AM, Peter De Schrijver wrote:
>>> Implement fuse driver for Tegra20, Tegra30, Tegra114 and Tegra124.
>>>
>>> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
>>> ---
>>> Documentation/ABI/testing/sysfs-driver-tegra-fuse | 11 +
>>> drivers/misc/fuse/Makefile | 1 +
>>> drivers/misc/fuse/tegra/Makefile | 7 +
>>> drivers/misc/fuse/tegra/fuse-tegra.c | 250 +++++++++++++++++
>>
>> I wonder if we shouldn't put this into drivers/soc/tegra?
>>
>>> diff --git a/drivers/misc/fuse/tegra/fuse-tegra.c b/drivers/misc/fuse/tegra/fuse-tegra.c
>>
>>> +void __init tegra_init_fuse(void)
>>> +{
>>> + struct device_node *np;
>>> + u32 id;
>>> + void __iomem *car_base;
>>> +
>>> + np = of_find_matching_node(NULL, apbmisc_match);
>>> + apbmisc_base = of_iomap(np, 0);
>>> + if (!apbmisc_base) {
>>> + pr_warn("ioremap tegra apbmisc failed. using %08x instead\n",
>>> + APBMISC_BASE);
>>> + apbmisc_base = ioremap(APBMISC_BASE, APBMISC_SIZE);
>>> + }
>>> +
>>> + id = tegra_read_chipid();
>>> + tegra_chip_id = (id >> 8) & 0xff;
>>
>> So there's a fallback using APBMIS_BASE above if the node is missing, so
>> those last 2 lines always happen. However, if any of the following fail:
>>
>>> + strapping_base = of_iomap(np, 0);
>> ...
>>> + np = of_find_matching_node(NULL, tegra_fuse_match);
>> ...
>>> + np = of_find_matching_node(NULL, car_match);
>>
>> Then this doesn't get executed:
>>
>>> + tegra_get_revision(id);
>>
>> Isn't that important?
>
> No. It's only used to populate /sys/devices/soc0/revision. I don't think
> that's particularly important.
But it's a feature that works today. Why should we break it?
>> I guess that can't run if the lookup for tegra_fuse_match isn't
>> successful, since that tegra_get_revision may call
>> tegra20_spare_fuse_early() which uses fuse_base which is set up in
>> response to succesfully calling on of those node lookups. Isn't a
>> fallback needed there too?
>
> tegra20_spare_fuse_early() will not be called if fuse_base is NULL.
Oh yes. We can at least call the function then even if the fuses can't
be mapped.
But to avoid regressions, we should simply make sure the fuses can be
mapped.
>> I'm also a bit concerned that the driver probes, rather than the early
>> function tegra_init_fuse(), are doing things like setting up the speedo
>> data initialization, randomness addition, etc. For one, those won't
>> happen any more unless the DT nodes are present, and secondly,
>> triggering all those from driver probe rather than a function that's
>> called from the machine descriptor makes guaranteeing the timing
>> problematic.
>
> Today there are no users of the speedo ID in upstream.
Well, except people reading kernel log messages. Accurate speedo-related
log messages have help pin-point a problem or two in the past.
> Looking at chromeos
> the users of the speedo ID are: CPU dvfs, GPU dvfs and sdhci. The last 2 also
> need regulators and therefor will need to support deferred probing anyway.
> CPU dvfs isn't critical at all, we don't care when it gets initialized. So
> deferred probe is fine.
What condition will those modules/drivers use to defer their probe?
> sdhci needs this for faster modes I guess which will also need extra DT
> properties looking at the chromeos driver. The others definitely will need
> an updated DT. For randomness I haven't seen any appreciable difference in when
> the 'random: nonblocking pool is initialized' message appears between having
> the randomness addition or not. Most likely the bulk of the randomness comes
> from serial interrupts rather than the fuse data. So I don't think the move to
> a driver probe will cause any problem. Nor do I think the lack of an updated
> DT will cause problems.
But what advantage do we have by actively changing it?
next prev parent reply other threads:[~2014-06-05 22:54 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-05 13:09 [PATCH v7 0/5] efuse driver for Tegra Peter De Schrijver
2014-06-05 13:09 ` [PATCH v7 1/5] ARM: tegra: export apb dma readl/writel Peter De Schrijver
2014-06-05 17:57 ` Stephen Warren
2014-06-05 18:06 ` Stephen Warren
2014-06-05 13:09 ` [PATCH v7 2/5] ARM: tegra: move fuse exports to tegra-soc.h Peter De Schrijver
2014-06-05 13:09 ` [PATCH v7 3/5] misc: fuse: Add efuse driver for Tegra Peter De Schrijver
2014-06-05 17:01 ` Tuomas Tynkkynen
2014-06-05 18:09 ` Stephen Warren
2014-06-05 18:37 ` Stephen Warren
2014-06-05 22:09 ` Peter De Schrijver
2014-06-05 22:54 ` Stephen Warren [this message]
2014-06-06 7:35 ` Peter De Schrijver
2014-06-09 18:29 ` Stephen Warren
2014-06-11 12:47 ` Mikko Perttunen
2014-06-11 15:25 ` Peter De Schrijver
2014-06-11 15:58 ` Stephen Warren
2014-06-11 16:19 ` Peter De Schrijver
2014-06-11 16:29 ` Stephen Warren
2014-06-05 13:09 ` [PATCH v7 4/5] ARM: tegra: Add efuse and apbmisc bindings Peter De Schrijver
2014-06-05 18:41 ` Stephen Warren
2014-06-05 22:13 ` Peter De Schrijver
2014-06-05 22:55 ` Stephen Warren
2014-06-06 7:35 ` Peter De Schrijver
2014-06-05 13:09 ` [PATCH v7 5/5] ARM: tegra: build new fuse driver in drivers/misc Peter De Schrijver
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