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From: Peter Hurley <peter@hurleysoftware.com>
To: Pranith Kumar <bobby.prani@gmail.com>,
	Pranith Kumar <pranith@gatech.edu>,
	dwmw2@infradead.org, joro@8bytes.org
Cc: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/1] use documented cmpxchg api
Date: Fri, 06 Jun 2014 06:55:32 -0400	[thread overview]
Message-ID: <53919E24.3010206@hurleysoftware.com> (raw)
In-Reply-To: <5391136C.3010809@gmail.com>

On 06/05/2014 09:03 PM, Pranith Kumar wrote:
> On 06/05/2014 08:34 PM, Peter Hurley wrote:
>> On 06/05/2014 06:19 PM, Pranith Kumar wrote:
>>> use the documented atomic_cmpxchg instead of __cmpxchg64
>>>
>>> This kills the last user of said API in drivers code.
>>>
>>>
>>> Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
>>> ---
>>>    drivers/iommu/intel-iommu.c |    2 +-
>>>    1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
>>> index 6bb3277..270113f 100644
>>> --- a/drivers/iommu/intel-iommu.c
>>> +++ b/drivers/iommu/intel-iommu.c
>>> @@ -293,7 +293,7 @@ static inline u64 dma_pte_addr(struct dma_pte *pte)
>>>        return pte->val & VTD_PAGE_MASK;
>>>    #else
>>>        /* Must have a full atomic 64-bit read */
>>> -    return  __cmpxchg64(&pte->val, 0ULL, 0ULL) & VTD_PAGE_MASK;
>>> +    return  atomic_cmpxchg(&pte->val, 0ULL, 0ULL) & VTD_PAGE_MASK;
>>
>> This is not equivalent.
>>
>> The __cmpxchg64() is specifically being used in this case
>> when !CONFIG_64BIT for a full 64-bit RMW, whereas atomic_cmpxchg()
>> uses ints which would be 32-bit RMW.
>>
>
>
> You are right! The previous patch is wrong in that atomic_cmpxchg needs an atomic_t argument.
> cmpxchg() handles the size internally using typeof() to figure out the width of RMW.
> There is also an explicit cmpxchg64() which does the same thing.


This won't work either, and should generate a compile or link error
on CONFIG_X86_32.

The auto-sizing done by __cmpxchg() does not substitute the cmpxchg8b
instruction for the cmpxchg instruction. __X86_CASE_Q is defined as -1 for
CONFIG_X86_32 so the 8-byte size variant is dead-code, and calls
__cmpxchg_wrong_size() instead.


> Fixed with the following v2:
>
> use the documented cmpxchg instead of __cmpxchg64
>
> This kills the last user of said API in drivers code.
>
> Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
> ---
>   drivers/iommu/intel-iommu.c |    2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
> index 6bb3277..270113f 100644
> --- a/drivers/iommu/intel-iommu.c
> +++ b/drivers/iommu/intel-iommu.c
> @@ -293,7 +293,7 @@ static inline u64 dma_pte_addr(struct dma_pte *pte)
>   	return pte->val & VTD_PAGE_MASK;
>   #else
>   	/* Must have a full atomic 64-bit read */
> -	return  __cmpxchg64(&pte->val, 0ULL, 0ULL) & VTD_PAGE_MASK;
> +	return  cmpxchg(&pte->val, 0ULL, 0ULL) & VTD_PAGE_MASK;
>   #endif
>   }



  reply	other threads:[~2014-06-06 10:55 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-05 22:19 [PATCH 1/1] use documented cmpxchg api Pranith Kumar
2014-06-06  0:34 ` Peter Hurley
2014-06-06  1:03   ` Pranith Kumar
2014-06-06 10:55     ` Peter Hurley [this message]
2014-06-06 14:27       ` Pranith Kumar

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