* [PATCH 2/2] ARM: dts: Add cros_ec to exynos5420-peach-pit and exynos5800-peach-pi
2014-06-13 18:13 [PATCH 1/2] mfd: cros_ec: spi: Fix end of transfer on devices with no spi-msg-delay Doug Anderson
@ 2014-06-13 18:13 ` Doug Anderson
2014-06-17 16:37 ` Javier Martinez Canillas
2014-06-16 14:24 ` [PATCH 1/2] mfd: cros_ec: spi: Fix end of transfer on devices with no spi-msg-delay Lee Jones
1 sibling, 1 reply; 4+ messages in thread
From: Doug Anderson @ 2014-06-13 18:13 UTC (permalink / raw)
To: Samuel Ortiz, Lee Jones, Kukjin Kim
Cc: Tomasz Figa, broonie, sjg, olof, javier.martinez, ch.naveen,
swarren, khilman, ajaynumb, rahul.sharma, tushar.b,
linux-samsung-soc, Doug Anderson, ben-linux, robh+dt, pawel.moll,
mark.rutland, ijc+devicetree, galak, linux, linux-arm-kernel,
devicetree, linux-kernel
This adds cros_ec to exynos5420-peach-pit and exynos5800-peach-pi,
including:
* The keyboard
* The i2c tunnel
* The tps65090 under the i2c tunnel
* The battery under the i2c tunnel
To add extra motivation, it should be noted that tps65090 is one of
the things needed to get display-related FETs turned on for pit and
pi.
Note that this relies on a few outstanding changes:
* Needs "cros-ec-keyboard.dtsi" in order to compile properly. See
(ARM: dts: Create a cros-ec-keyboard fragment) at
<https://patchwork.kernel.org/patch/4297451/>.
* Needs (mfd: cros_ec: spi: Fix end of transfer on devices with no
spi-msg-delay) from this series to work properly.
* Needs (spi: s3c64xx: fix broken "cs_gpios" usage in the driver) and
(spi: s3c64xx: for DT platofrms always get the chipselect info from
DT node) to work properly and match the documented bindings. See
<https://patchwork.kernel.org/patch/4346701/> and
<https://patchwork.kernel.org/patch/4346711/>
Signed-off-by: Doug Anderson <dianders@chromium.org>
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 146 +++++++++++++++++++++++++++++
arch/arm/boot/dts/exynos5800-peach-pi.dts | 146 +++++++++++++++++++++++++++++
2 files changed, 292 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 1c5b8f9..67b7c32 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -25,6 +25,11 @@
"google,pit", "google,peach","samsung,exynos5420",
"samsung,exynos5";
+ aliases {
+ /* Assign 20 so we don't get confused w/ builtin ones */
+ i2c20 = "/spi@12d40000/cros-ec@0/i2c-tunnel";
+ };
+
memory {
reg = <0x20000000 0x80000000>;
};
@@ -87,6 +92,13 @@
pinctrl-0 = <&usb301_vbus_en>;
enable-active-high;
};
+
+ vbat: fixed-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vbat-supply";
+ regulator-boot-on;
+ regulator-always-on;
+ };
};
&pinctrl_0 {
@@ -111,6 +123,20 @@
samsung,pin-drv = <0>;
};
+ ec_irq: ec-irq {
+ samsung,pins = "gpx1-5";
+ samsung,pin-function = <0>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ tps65090_irq: tps65090-irq {
+ samsung,pins = "gpx2-5";
+ samsung,pin-function = <0>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
hdmi_hpd_irq: hdmi-hpd-irq {
samsung,pins = "gpx3-7";
samsung,pin-function = <0>;
@@ -127,6 +153,19 @@
};
&pinctrl_3 {
+ /* Drive SPI lines at x2 for better integrity */
+ spi2-bus {
+ samsung,pin-drv = <2>;
+ };
+
+ /* Drive SPI chip select at x2 for better integrity */
+ ec_spi_cs: ec-spi-cs {
+ samsung,pins = "gpb1-2";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <2>;
+ };
+
usb300_vbus_en: usb300-vbus-en {
samsung,pins = "gph0-0";
samsung,pin-function = <1>;
@@ -189,6 +228,111 @@
};
};
+&spi_2 {
+ status = "okay";
+ num-cs = <1>;
+ samsung,spi-src-clk = <0>;
+ cs-gpios = <&gpb1 2 0>;
+
+ cros_ec: cros-ec@0 {
+ compatible = "google,cros-ec-spi";
+ interrupt-parent = <&gpx1>;
+ interrupts = <5 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ec_spi_cs &ec_irq>;
+ reg = <0>;
+ spi-max-frequency = <3125000>;
+
+ controller-data {
+ samsung,spi-feedback-delay = <1>;
+ };
+
+ i2c-tunnel {
+ compatible = "google,cros-ec-i2c-tunnel";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ google,remote-bus = <0>;
+
+ battery: sbs-battery@b {
+ compatible = "sbs,sbs-battery";
+ reg = <0xb>;
+ sbs,poll-retry-count = <1>;
+ sbs,i2c-retry-count = <2>;
+ };
+
+ power-regulator@48 {
+ compatible = "ti,tps65090";
+ reg = <0x48>;
+
+ /*
+ * Config irq to disable internal pulls
+ * even though we run in polling mode.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&tps65090_irq>;
+
+ vsys1-supply = <&vbat>;
+ vsys2-supply = <&vbat>;
+ vsys3-supply = <&vbat>;
+ infet1-supply = <&vbat>;
+ infet2-supply = <&vbat>;
+ infet3-supply = <&vbat>;
+ infet4-supply = <&vbat>;
+ infet5-supply = <&vbat>;
+ infet6-supply = <&vbat>;
+ infet7-supply = <&vbat>;
+ vsys-l1-supply = <&vbat>;
+ vsys-l2-supply = <&vbat>;
+
+ regulators {
+ dcdc1 {
+ ti,enable-ext-control;
+ };
+ dcdc2 {
+ ti,enable-ext-control;
+ };
+ dcdc3 {
+ ti,enable-ext-control;
+ };
+ fet1 {
+ regulator-name = "vcd_led";
+ };
+ tps65090_fet2: fet2 {
+ regulator-name = "video_mid";
+ regulator-always-on;
+ };
+ fet3 {
+ regulator-name = "wwan_r";
+ regulator-always-on;
+ };
+ fet4 {
+ regulator-name = "sdcard";
+ regulator-always-on;
+ };
+ fet5 {
+ regulator-name = "camout";
+ };
+ fet6 {
+ regulator-name = "lcd_vdd";
+ };
+ tps65090_fet7: fet7 {
+ regulator-name = "video_mid_1a";
+ regulator-always-on;
+ };
+ ldo1 {
+ };
+ ldo2 {
+ };
+ };
+
+ charger {
+ compatible = "ti,tps65090-charger";
+ };
+ };
+ };
+ };
+};
+
&hsi2c_7 {
status = "okay";
@@ -285,3 +429,5 @@
};
};
};
+
+#include "cros-ec-keyboard.dtsi"
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index f3af207..b33f548 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -23,6 +23,11 @@
"google,pi", "google,peach", "samsung,exynos5800",
"samsung,exynos5";
+ aliases {
+ /* Assign 20 so we don't get confused w/ builtin ones */
+ i2c20 = "/spi@12d40000/cros-ec@0/i2c-tunnel";
+ };
+
memory {
reg = <0x20000000 0x80000000>;
};
@@ -78,6 +83,13 @@
pinctrl-0 = <&usb301_vbus_en>;
enable-active-high;
};
+
+ vbat: fixed-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vbat-supply";
+ regulator-boot-on;
+ regulator-always-on;
+ };
};
&pinctrl_0 {
@@ -102,6 +114,20 @@
samsung,pin-drv = <0>;
};
+ ec_irq: ec-irq {
+ samsung,pins = "gpx1-5";
+ samsung,pin-function = <0>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ tps65090_irq: tps65090-irq {
+ samsung,pins = "gpx2-5";
+ samsung,pin-function = <0>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
hdmi_hpd_irq: hdmi-hpd-irq {
samsung,pins = "gpx3-7";
samsung,pin-function = <0>;
@@ -111,6 +137,19 @@
};
&pinctrl_3 {
+ /* Drive SPI lines at x2 for better integrity */
+ spi2-bus {
+ samsung,pin-drv = <2>;
+ };
+
+ /* Drive SPI chip select at x2 for better integrity */
+ ec_spi_cs: ec-spi-cs {
+ samsung,pins = "gpb1-2";
+ samsung,pin-function = <1>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <2>;
+ };
+
usb300_vbus_en: usb300-vbus-en {
samsung,pins = "gph0-0";
samsung,pin-function = <1>;
@@ -173,6 +212,111 @@
};
};
+&spi_2 {
+ status = "okay";
+ num-cs = <1>;
+ samsung,spi-src-clk = <0>;
+ cs-gpios = <&gpb1 2 0>;
+
+ cros_ec: cros-ec@0 {
+ compatible = "google,cros-ec-spi";
+ interrupt-parent = <&gpx1>;
+ interrupts = <5 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ec_spi_cs &ec_irq>;
+ reg = <0>;
+ spi-max-frequency = <3125000>;
+
+ controller-data {
+ samsung,spi-feedback-delay = <1>;
+ };
+
+ i2c-tunnel {
+ compatible = "google,cros-ec-i2c-tunnel";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ google,remote-bus = <0>;
+
+ battery: sbs-battery@b {
+ compatible = "sbs,sbs-battery";
+ reg = <0xb>;
+ sbs,poll-retry-count = <1>;
+ sbs,i2c-retry-count = <2>;
+ };
+
+ power-regulator@48 {
+ compatible = "ti,tps65090";
+ reg = <0x48>;
+
+ /*
+ * Config irq to disable internal pulls
+ * even though we run in polling mode.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&tps65090_irq>;
+
+ vsys1-supply = <&vbat>;
+ vsys2-supply = <&vbat>;
+ vsys3-supply = <&vbat>;
+ infet1-supply = <&vbat>;
+ infet2-supply = <&vbat>;
+ infet3-supply = <&vbat>;
+ infet4-supply = <&vbat>;
+ infet5-supply = <&vbat>;
+ infet6-supply = <&vbat>;
+ infet7-supply = <&vbat>;
+ vsys-l1-supply = <&vbat>;
+ vsys-l2-supply = <&vbat>;
+
+ regulators {
+ dcdc1 {
+ ti,enable-ext-control;
+ };
+ dcdc2 {
+ ti,enable-ext-control;
+ };
+ dcdc3 {
+ ti,enable-ext-control;
+ };
+ fet1 {
+ regulator-name = "vcd_led";
+ };
+ tps65090_fet2: fet2 {
+ regulator-name = "video_mid";
+ regulator-always-on;
+ };
+ fet3 {
+ regulator-name = "wwan_r";
+ regulator-always-on;
+ };
+ fet4 {
+ regulator-name = "sdcard";
+ regulator-always-on;
+ };
+ fet5 {
+ regulator-name = "camout";
+ };
+ fet6 {
+ regulator-name = "lcd_vdd";
+ };
+ tps65090_fet7: fet7 {
+ regulator-name = "video_mid_1a";
+ regulator-always-on;
+ };
+ ldo1 {
+ };
+ ldo2 {
+ };
+ };
+
+ charger {
+ compatible = "ti,tps65090-charger";
+ };
+ };
+ };
+ };
+};
+
&dp {
status = "okay";
pinctrl-names = "default";
@@ -251,3 +395,5 @@
&watchdog {
timeout-sec = <32>;
};
+
+#include "cros-ec-keyboard.dtsi"
--
2.0.0.526.g5318336
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 1/2] mfd: cros_ec: spi: Fix end of transfer on devices with no spi-msg-delay
2014-06-13 18:13 [PATCH 1/2] mfd: cros_ec: spi: Fix end of transfer on devices with no spi-msg-delay Doug Anderson
2014-06-13 18:13 ` [PATCH 2/2] ARM: dts: Add cros_ec to exynos5420-peach-pit and exynos5800-peach-pi Doug Anderson
@ 2014-06-16 14:24 ` Lee Jones
1 sibling, 0 replies; 4+ messages in thread
From: Lee Jones @ 2014-06-16 14:24 UTC (permalink / raw)
To: Doug Anderson
Cc: Samuel Ortiz, Kukjin Kim, Tomasz Figa, broonie, sjg, olof,
javier.martinez, ch.naveen, swarren, khilman, ajaynumb,
rahul.sharma, tushar.b, linux-samsung-soc, linux-kernel
> cros_ec_spi makes the assumption that a 0-length message will put the
> spi chip select back to normal (non cs_toggle mode). This used to be
> the case back on kernel-3.8 on the spi-s3c64xx driver but doesn't
> appear to be true anymore. It seems like it was a pretty questionable
> assumption to begin with, so let's fix the code to be more robust. We
> know that a message with a single 0-length segment _will_ put things
> back in order. Change cros_ec_spi to handle this.
>
> This wasn't a problem on the main user of cros_ec_spi upstream (tegra)
> because it specified 'google,cros-ec-spi-msg-delay'.
>
> Signed-off-by: Doug Anderson <dianders@chromium.org>
> ---
> drivers/mfd/cros_ec_spi.c | 18 +++++++-----------
> 1 file changed, 7 insertions(+), 11 deletions(-)
Looks fine to me and I'm sure you've tested this on your platform.
Applied, thanks.
> diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/mfd/cros_ec_spi.c
> index 0b8d328..0cbc3db 100644
> --- a/drivers/mfd/cros_ec_spi.c
> +++ b/drivers/mfd/cros_ec_spi.c
> @@ -266,18 +266,14 @@ static int cros_ec_command_spi_xfer(struct cros_ec_device *ec_dev,
> dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
> }
>
> - /* turn off CS */
> + /*
> + * Turn off CS, possibly adding a delay to ensure the rising edge
> + * doesn't come too soon after the end of the data.
> + */
> spi_message_init(&msg);
> -
> - if (ec_spi->end_of_msg_delay) {
> - /*
> - * Add delay for last transaction, to ensure the rising edge
> - * doesn't come too soon after the end of the data.
> - */
> - memset(&trans, 0, sizeof(trans));
> - trans.delay_usecs = ec_spi->end_of_msg_delay;
> - spi_message_add_tail(&trans, &msg);
> - }
> + memset(&trans, 0, sizeof(trans));
> + trans.delay_usecs = ec_spi->end_of_msg_delay;
> + spi_message_add_tail(&trans, &msg);
>
> final_ret = spi_sync(ec_spi->spi, &msg);
> ktime_get_ts(&ts);
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog
^ permalink raw reply [flat|nested] 4+ messages in thread