From: Stefan Roese <sr@denx.de>
To: Jean-Michel Hautbois <jhautbois@gmail.com>,
linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: Lattice ECP3 FPGA with i.MX6
Date: Thu, 03 Jul 2014 14:49:18 +0200 [thread overview]
Message-ID: <53B5514E.5050504@denx.de> (raw)
In-Reply-To: <CAL8zT=gW-OCeeOhKZzqgVSxDE5gsWt2O9nQ9mt7diDZQvvRO=w@mail.gmail.com>
On 03.07.2014 14:37, Jean-Michel Hautbois wrote:
> I have a board, with a Freescale i.MX6 chip and a ECP3-35 FPGA on SPI.
> I tried to load the firmware using the lattice-ecp3-config driver, but
> it fails with this error :
>
> lattice-ecp3 spi32766.3: FPGA bitstream configuration driver registered
> lattice-ecp3 spi32766.3: Error: No supported FPGA detected (JEDEC_ID=808004c2)!
>
> In the driver, the id is :
>
> #define ID_ECP3_35 0xc2048080
>
> Obviously, there is a big/little endian issue... Do I need to instruct
> the device-tree in a specific way in order to get the bus in the
> correct order ? Or is this a known issue maybe ?
No. This driver was implemented and tested in a MPC5200 system. Most
likely I missed some endian issues as you already noticed. I suggest you
start with looking at this line:
jedec_id = *(u32 *)&rxbuf[4];
And add some endian functions here, e.g. be32_to_cpu(). This might help
with the detection. But other endian related issues might still be
present in other parts of the driver as well.
HTP.
Thanks,
Stefan
next prev parent reply other threads:[~2014-07-03 12:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-03 12:37 Lattice ECP3 FPGA with i.MX6 Jean-Michel Hautbois
2014-07-03 12:49 ` Stefan Roese [this message]
2014-07-03 15:05 ` Jean-Michel Hautbois
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