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From: "Yan, Zheng" <zheng.z.yan@intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: linux-kernel@vger.kernel.org, mingo@kernel.org,
	acme@infradead.org, eranian@google.com, andi@firstfloor.org
Subject: Re: [PATCH v3 6/9] perf, x86: handle multiple records in PEBS buffer
Date: Fri, 25 Jul 2014 16:34:44 +0800	[thread overview]
Message-ID: <53D216A4.3090600@intel.com> (raw)
In-Reply-To: <20140725081033.GV3935@laptop>

On 07/25/2014 04:10 PM, Peter Zijlstra wrote:
> On Tue, Jul 22, 2014 at 04:09:59PM +0800, Yan, Zheng wrote:
>> One corner case needs to mention is that the PEBS hardware doesn't
>> deal well with collisions, when PEBS events happen near to each
>> other. The records for the events can be collapsed into a single
>> one. However in practice collisions are extremely rare, as long as
>> different events are used. The periods are typically very large,
>> so any collision is unlikely. When collision happens, we can either
>> drop the PEBS record or use the record to serve multiple events.
>> This patch chooses the later approach.
> 
> You can't.. the events might have different security context.
> 
> Remember, the overflow bit is set from the overflow until the PEBS
> event is generated, this is quite a long time. So if another PEBS event
> gets generated while the other is still pending it will have both bits
> set. Even though the second bit is for another (unrelated) counter.
> 
> The unrelated counter might not have privilege to observe the data of
> the generated event.
> 
> I think you can unwind and fully correct this trainwreck.

could you give more information how to do this.

Regards
Yan, Zheng

> But simply
> delivering an even with multiple bits set to all relevant events is
> wrong and might leak sensitive information.
> 


  reply	other threads:[~2014-07-25  8:34 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-22  8:09 [PATCH v3 0/7] perf, x86: large PEBS interrupt threshold Yan, Zheng
2014-07-22  8:09 ` [PATCH v3 1/9] perf, core: introduce pmu context switch callback Yan, Zheng
2014-07-22  8:09 ` [PATCH v3 2/9] perf, x86: use context switch callback to flush LBR stack Yan, Zheng
2014-07-22  8:09 ` [PATCH v3 3/9] perf, x86: use the PEBS auto reload mechanism when possible Yan, Zheng
2014-07-22  8:09 ` [PATCH v3 4/9] perf, x86: introduce setup_pebs_sample_data() Yan, Zheng
2014-07-22  8:09 ` [PATCH v3 5/9] perf, x86: large PEBS interrupt threshold Yan, Zheng
2014-07-22 16:16   ` Andi Kleen
2014-07-23  0:59     ` Yan, Zheng
2014-07-22  8:09 ` [PATCH v3 6/9] perf, x86: handle multiple records in PEBS buffer Yan, Zheng
2014-07-25  8:10   ` Peter Zijlstra
2014-07-25  8:34     ` Yan, Zheng [this message]
2014-07-25 14:06       ` Peter Zijlstra
2014-07-28  2:24         ` Yan, Zheng
2014-07-28  3:36           ` Andi Kleen
2014-07-28  6:52           ` Peter Zijlstra
2014-07-31  7:31             ` Yan, Zheng
2014-07-31 14:44               ` Andi Kleen
2014-07-31 15:25                 ` Peter Zijlstra
2014-07-25 15:04     ` Andi Kleen
2014-07-25 15:53       ` Peter Zijlstra
2014-07-25 16:40         ` Andi Kleen
2014-07-28  3:20           ` Yan, Zheng
2014-07-28  3:34             ` Andi Kleen
2014-07-28  6:54           ` Peter Zijlstra
2014-07-22  8:10 ` [PATCH v3 7/9] perf, x86: drain PEBS buffer during context switch Yan, Zheng
2014-07-22  8:10 ` [PATCH v3 8/9] perf, x86: enlarge PEBS buffer Yan, Zheng
2014-07-22  8:10 ` [PATCH v3 9/9] tools, perf: Allow the user to disable time stamps Yan, Zheng

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