From: "Kever.Yang" <kever.yang@rock-chips.com>
To: Doug Anderson <dianders@chromium.org>,
Paul Zimmerman <Paul.Zimmerman@synopsys.com>
Cc: "heiko@sntech.de" <heiko@sntech.de>,
"olof@lixom.net" <olof@lixom.net>,
"sonnyrao@chromium.org" <sonnyrao@chromium.org>,
"addy.ke@rock-chips.com" <addy.ke@rock-chips.com>,
"cf@rock-chips.com" <cf@rock-chips.com>,
"xjq@rock-chips.com" <xjq@rock-chips.com>,
"wulf@rock-chips.com" <wulf@rock-chips.com>,
"lyz@rock-chips.com" <lyz@rock-chips.com>,
"hj@rock-chips.com" <hj@rock-chips.com>,
"huangtao@rock-chips.com" <huangtao@rock-chips.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"linux-usb@vger.kernel.org" <linux-usb@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 2/4] usb: dwc2: add compatible data for rockchip soc
Date: Fri, 08 Aug 2014 09:42:54 +0800 [thread overview]
Message-ID: <53E42B1E.2080605@rock-chips.com> (raw)
In-Reply-To: <CAD=FV=UqeDWQiA7sAS6CuM74B0GS+5HcJD9Bd8FfF7awsdG7Vg@mail.gmail.com>
On 08/08/2014 04:52 AM, Doug Anderson wrote:
> Paul,
>
> On Thu, Aug 7, 2014 at 11:26 AM, Paul Zimmerman
> <Paul.Zimmerman@synopsys.com> wrote:
>>> From: Kever Yang [mailto:kever.yang@gmail.com] On Behalf Of Kever Yang
>>> Sent: Thursday, August 07, 2014 2:35 AM
>>>
>>> This patch add compatible data for dwc2 controller found on
>>> rk3066, rk3188 and rk3288 processors from rockchip.
>>>
>>> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
>>> Acked-by: Paul Zimmerman <paulz@synopsys.com>
>>> ---
>>>
>>> Changes in v4:
>>> - max_transfer_size change to 65536, this should be enough
>>> for most transfer, the hardware auto-detect will set this
>>> to 0x7ffff which may make dma_alloc_coherent fail when
>>> non-dword aligned buf from driver like usbnet happen.
>> Hi Kever,
>>
>> Did you test this change thoroughly? I have vague memories of any
>> value above 65535 causing problems, at least on my hardware. And I
>> see it is set to 65535 in both pci.c and platform.c. I could be
>> wrong, but I thought I should mention it.
> Certainly it is documented in the header file to have a max of 65535:
>
> * @max_transfer_size: The maximum transfer size supported, in bytes
> * 2047 to 65,535
> * Actual maximum value is autodetected and also
> * the default.
Sorry for didn't check the header file, I'll change it to 65535 and
resubmit.
>
> ...but looking at the register definition that I see, the size can be
> up to 19 bits. A 19-bit transfer far exceeds 65535. Do you remember
> what the error was? Certainly I can imagine there being errors with
> large calls to dma_alloc_coherent()...
>
> I know that with Kever's change I can do USB Ethernet downloads, so it
> is at least working to some degree. ...to me it feels like Kever
> should resubmit with 65535 (to match the documentation) and then work
> in the background to figure out what the max_transfer_size really
> ought to be.
You are right.
> -Doug
>
>
>
next prev parent reply other threads:[~2014-08-08 1:43 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-07 9:34 [PATCH v4 0/4] Patches to add support for Rockchip dwc2 controller Kever Yang
2014-08-07 9:34 ` [PATCH v4 1/4] Documentation: dt-bindings: add dt binding info for Rockchip dwc2 Kever Yang
2014-08-07 9:34 ` [PATCH v4 2/4] usb: dwc2: add compatible data for rockchip soc Kever Yang
2014-08-07 18:26 ` Paul Zimmerman
2014-08-07 20:52 ` Doug Anderson
2014-08-07 20:59 ` Paul Zimmerman
2014-08-08 1:42 ` Kever.Yang [this message]
2014-08-08 0:39 ` Kever Yang
2014-08-07 9:34 ` [PATCH v4 3/4] ARM: dts: add rk3288 dwc2 controller support Kever Yang
2014-08-07 21:17 ` Doug Anderson
2014-08-07 9:34 ` [PATCH v4 4/4] ARM: dts: Enable USB otg and host1(dwc) on rk3288-evb Kever Yang
2014-08-07 21:23 ` Doug Anderson
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