Re: [Xen-devel] [PATCH RFC 2/3] x86: Enable PAT to use cache mode translation tables

[Juergen Gross <jgross@suse.com>]

On 08/22/2014 11:32 AM, Jan Beulich wrote:
>>>> On 19.08.14 at 15:25, <JGross@suse.com> wrote:
>> @@ -118,8 +167,14 @@ void pat_init(void)
>>   	      PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, UC);
>>
>>   	/* Boot CPU check */
>> -	if (!boot_pat_state)
>> +	if (!boot_pat_state) {
>>   		rdmsrl(MSR_IA32_CR_PAT, boot_pat_state);
>> +		/*
>> +		 * Init cache mode tables before writing MSR to give Xen a
>> +		 * chance to correct the changes when doing the write.
>> +		 */
>
> This comment seems pretty odd to me: For one, a PV guest on Xen
> shouldn't be trying to write PAT MSR at all under the current ABI
> (the write will be ignored, yes, but accompanied with a warning
> message, which PV kernels - by the mere fact that they're PV -
> should try to avoid). And then "correct the changes" both gives
> the impression as if they were wrong and as if some of what the
> kernel writes may be under the kernel's control. Hence I think this
> code and comment should either be consistently assuming that the
> kernel has no control at all, or should read back the value after
> having written it, and set the internal tables based on the value
> read back.

I think the latter alternative is the better one. I'll change the
patch.

Juergen