From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Anshuman Khandual <anshuman.khandual@arm.com>,
linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Mike Leach <mike.leach@linaro.org>,
James Clark <james.clark@arm.com>, Leo Yan <leo.yan@linaro.org>,
Jonathan Corbet <corbet@lwn.net>,
linux-doc@vger.kernel.org, coresight@lists.linaro.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH V5 - RESEND 1/3] coresight: etm: Override TRCIDR3.CCITMIN on errata affected cpus
Date: Wed, 20 Sep 2023 10:11:27 +0100 [thread overview]
Message-ID: <53b1867e-2374-852d-e110-fb51bddd6475@arm.com> (raw)
In-Reply-To: <ca5728fb-87fb-0088-4769-3087060182e2@arm.com>
On 20/09/2023 07:40, Anshuman Khandual wrote:
>
>
> On 9/19/23 16:56, Suzuki K Poulose wrote:
>> Hi Anshuman
>>
>>> +
>>> +static bool etm4_core_reads_wrong_ccitmin(struct etmv4_drvdata *drvdata)
>>> +{
>>> + /*
>>> + * Erratum affected cpus will read 256 as the minimum
>>> + * instruction trace cycle counting threshold whereas
>>> + * the correct value should be 4 instead. Override the
>>> + * recorded value for 'drvdata->ccitmin' to workaround
>>> + * this problem.
>>> + */
>>> + return is_midr_in_range_list(read_cpuid_id(), etm_wrong_ccitmin_cpus) &&
>>> + (drvdata->ccitmin == 256);
>>
>> minor nit: Having looked at this, it feels like, fixing the ccitmin
>> value to 4, could be moved into this function. Otherwise, we have all
>> the required information about the erratum and the real application of
>> work around is left in the caller, which kind of feels disconnected.
>>
>> So, please could we rename the above function to:
>>
>> static void etm4_fixup_wrong_ccitmin(str..)
>> {
>> /* Comment as above */
>> if (....)
>> drvdata->ccitmin = 4;
>> }
>
> I will fold in the following change for the patch. Please do let me
> know if this reflects your suggestions accurately. Also planning to
> carry Mike's tag after the change.
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index 044aed25979b..5b6a878a2ac5 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -1175,7 +1175,7 @@ static struct midr_range etm_wrong_ccitmin_cpus[] = {
> {},
> };
>
> -static bool etm4_core_reads_wrong_ccitmin(struct etmv4_drvdata *drvdata)
> +static void etm4_fixup_wrong_ccitmin(struct etmv4_drvdata *drvdata)
> {
> /*
> * Erratum affected cpus will read 256 as the minimum
> @@ -1184,8 +1184,10 @@ static bool etm4_core_reads_wrong_ccitmin(struct etmv4_drvdata *drvdata)
> * recorded value for 'drvdata->ccitmin' to workaround
> * this problem.
> */
> - return is_midr_in_range_list(read_cpuid_id(), etm_wrong_ccitmin_cpus) &&
> - (drvdata->ccitmin == 256);
> + if (is_midr_in_range_list(read_cpuid_id(), etm_wrong_ccitmin_cpus)) {
> + if (drvdata->ccitmin == 256)
> + drvdata->ccitmin = 4;
> + }
> }
>
> static void etm4_init_arch_data(void *info)
> @@ -1252,8 +1254,7 @@ static void etm4_init_arch_data(void *info)
> etmidr3 = etm4x_relaxed_read32(csa, TRCIDR3);
> /* CCITMIN, bits[11:0] minimum threshold value that can be programmed */
> drvdata->ccitmin = FIELD_GET(TRCIDR3_CCITMIN_MASK, etmidr3);
> - if (etm4_core_reads_wrong_ccitmin(drvdata))
> - drvdata->ccitmin = 4;
> + etm4_fixup_wrong_ccitmin(drvdata);
>
> /* EXLEVEL_S, bits[19:16] Secure state instruction tracing */
> drvdata->s_ex_level = FIELD_GET(TRCIDR3_EXLEVEL_S_MASK, etmidr3);
>
LGTM, thanks for addressing it quickly
Suzuki
next prev parent reply other threads:[~2023-09-20 9:11 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-15 9:36 [PATCH V5 - RESEND 0/3] coresight: etm: Make cycle count threshold user configurable Anshuman Khandual
2023-09-15 9:36 ` [PATCH V5 - RESEND 1/3] coresight: etm: Override TRCIDR3.CCITMIN on errata affected cpus Anshuman Khandual
2023-09-19 11:06 ` Mike Leach
2023-09-19 11:26 ` Suzuki K Poulose
2023-09-20 6:40 ` Anshuman Khandual
2023-09-20 8:49 ` Mike Leach
2023-09-20 9:11 ` Suzuki K Poulose [this message]
2023-09-15 9:36 ` [PATCH V5 - RESEND 2/3] coresight: etm: Make cycle count threshold user configurable Anshuman Khandual
2023-09-19 11:07 ` Mike Leach
2023-09-20 9:22 ` Suzuki K Poulose
2023-09-20 10:44 ` Anshuman Khandual
2023-09-15 9:36 ` [PATCH V5 - RESEND 3/3] Documentation: coresight: Add cc_threshold tunable Anshuman Khandual
2023-09-20 9:25 ` Suzuki K Poulose
2023-09-20 10:41 ` Anshuman Khandual
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