From: Dave Hansen <dave@sr71.net>
To: Peter Zijlstra <peterz@infradead.org>,
Chuck Ebbert <cebbert.lkml@gmail.com>
Cc: Ingo Molnar <mingo@kernel.org>,
linux-kernel@vger.kernel.org, borislav.petkov@amd.com,
andreas.herrmann3@amd.com, hpa@linux.intel.com,
ak@linux.intel.com
Subject: Re: [PATCH] x86: Consider multiple nodes in a single socket to be "sane"
Date: Tue, 16 Sep 2014 09:46:30 -0700 [thread overview]
Message-ID: <54186966.3010901@sr71.net> (raw)
In-Reply-To: <20140916160134.GB2848@worktop.localdomain>
On 09/16/2014 09:01 AM, Peter Zijlstra wrote:
> On Tue, Sep 16, 2014 at 02:03:00AM -0500, Chuck Ebbert wrote:
>> Hmm, looking closer at the diagram, each ring has its own memory controller, so
>> it really is NUMA if you break the interconnect between that caches.
>
> How does it do that? Does it split the DIMM slots in two as well, with
> half for the one node and the other half for the other? Or will both
> 'nodes' share the same local memory?
I the diagrams in here are accurate in describing the rings:
http://www.enterprisetech.com/2014/09/08/intel-ups-performance-ante-haswell-xeon-chips/
The "nodes" each get their own memory controller and exclusive set of DIMMs.
next prev parent reply other threads:[~2014-09-16 16:46 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-15 22:26 [PATCH] x86: Consider multiple nodes in a single socket to be "sane" Dave Hansen
2014-09-16 3:29 ` Peter Zijlstra
2014-09-16 6:38 ` Chuck Ebbert
2014-09-16 6:44 ` Ingo Molnar
2014-09-16 7:03 ` Chuck Ebbert
2014-09-16 7:05 ` Ingo Molnar
2014-09-16 16:01 ` Peter Zijlstra
2014-09-16 16:46 ` Dave Hansen [this message]
2014-09-16 15:59 ` Peter Zijlstra
2014-09-16 16:36 ` Dave Hansen
2014-09-16 8:17 ` Dave Hansen
2014-09-16 10:07 ` Heiko Carstens
2014-09-16 17:58 ` Peter Zijlstra
2014-09-16 23:49 ` Dave Hansen
2014-09-17 22:57 ` Peter Zijlstra
2014-09-18 0:33 ` Dave Hansen
2014-09-17 12:55 ` Borislav Petkov
2014-09-18 7:32 ` Borislav Petkov
2014-09-16 16:59 ` Brice Goglin
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