From: Stephen Boyd <sboyd@codeaurora.org>
To: Sudeep Holla <sudeep.holla@arm.com>, LKML <linux-kernel@vger.kernel.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Russell King <linux@arm.linux.org.uk>,
Will Deacon <will.deacon@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 10/11] ARM: kernel: add support for cpu cache information
Date: Fri, 19 Sep 2014 15:25:44 -0700 [thread overview]
Message-ID: <541CAD68.2090009@codeaurora.org> (raw)
In-Reply-To: <1409763617-17074-11-git-send-email-sudeep.holla@arm.com>
On 09/03/14 10:00, Sudeep Holla wrote:
> From: Sudeep Holla <sudeep.holla@arm.com>
>
> This patch adds support for cacheinfo on ARM platforms.
>
> On ARMv7, the cache hierarchy can be identified through Cache Level ID
> register(CLIDR) while the cache geometry is provided by Cache Size ID
> register(CCSIDR).
>
> On architecture versions before ARMv7, CLIDR and CCSIDR is not
> implemented. The cache type register(CTR) provides both cache hierarchy
> and geometry if implemented. For implementations that doesn't support
> CTR, we need to list the probable value of CTR if it was implemented
> along with the cpuid for the sake of simplicity to handle them.
>
> Since the architecture doesn't provide any way of detecting the cpus
> sharing particular cache, device tree is used fo the same purpose.
> On non-DT platforms, first level caches are per-cpu while higher level
> caches are assumed system-wide.
>
> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Will Deacon <will.deacon@arm.com>
> Cc: linux-arm-kernel@lists.infradead.org
>
Tested-by: Stephen Boyd <sboyd@codeaurora.org>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
next prev parent reply other threads:[~2014-09-19 22:25 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-03 17:00 [PATCH v4 00/11] drivers: cacheinfo support Sudeep Holla
2014-09-03 17:00 ` [PATCH v4 01/11] cpumask: factor out show_cpumap into separate helper function Sudeep Holla
2014-09-03 17:05 ` Bjorn Helgaas
2014-09-03 17:09 ` Sudeep Holla
2014-09-03 21:46 ` Rafael J. Wysocki
2014-09-04 6:20 ` Peter Zijlstra
2014-09-04 9:03 ` Sudeep Holla
2014-09-04 9:21 ` Peter Zijlstra
2014-09-04 10:43 ` Sudeep Holla
2014-09-04 11:25 ` Peter Zijlstra
2014-09-04 12:27 ` Sudeep Holla
2014-09-04 15:46 ` [PATCH v4 01/11 UPDATE] " Sudeep Holla
2014-09-19 22:23 ` Stephen Boyd
2014-09-24 8:51 ` Sudeep Holla
2014-09-24 10:20 ` Peter Zijlstra
2014-09-03 17:00 ` [PATCH v4 02/11] topology: replace custom attribute macros with standard DEVICE_ATTR* Sudeep Holla
2014-09-03 17:00 ` [PATCH v4 03/11] drivers: base: add cpu_device_create to support per-cpu devices Sudeep Holla
2014-09-19 22:23 ` Stephen Boyd
2014-09-03 17:00 ` [PATCH v4 04/11] drivers: base: support cpu cache information interface to userspace via sysfs Sudeep Holla
2014-09-17 17:25 ` Sudeep Holla
2014-09-17 19:00 ` Greg Kroah-Hartman
2014-09-24 6:35 ` Greg Kroah-Hartman
2014-09-30 13:53 ` Sudeep Holla
2014-09-19 22:24 ` Stephen Boyd
2014-09-22 8:55 ` Sudeep Holla
2014-09-03 17:00 ` [PATCH v4 05/11] ia64: move cacheinfo sysfs to generic cacheinfo infrastructure Sudeep Holla
2014-09-03 17:00 ` [PATCH v4 06/11] s390: " Sudeep Holla
2014-09-03 17:00 ` [PATCH v4 07/11] x86: " Sudeep Holla
2014-09-03 17:00 ` [PATCH v4 08/11] powerpc: " Sudeep Holla
2014-09-03 17:00 ` [PATCH v4 09/11] ARM64: kernel: add support for cpu cache information Sudeep Holla
2014-09-10 16:41 ` Will Deacon
2014-09-10 17:21 ` Sudeep Holla
2014-09-03 17:00 ` [PATCH v4 10/11] ARM: " Sudeep Holla
2014-09-19 22:25 ` Stephen Boyd [this message]
2014-09-03 17:00 ` [PATCH v4 11/11] ARM: kernel: add outer cache support for cacheinfo implementation Sudeep Holla
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