From: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: Chen Yucong <slaoub@gmail.com>, Tony Luck <tony.luck@intel.com>,
"linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: Fwd: [PATCH] x86, MCE, AMD: save IA32_MCi_STATUS before machine_check_poll() resets it
Date: Wed, 29 Oct 2014 10:59:56 -0500 [thread overview]
Message-ID: <54510EFC.2080107@amd.com> (raw)
In-Reply-To: <20141022093042.GB2511@pd.tnic>
On 10/22/2014 4:30 AM, Borislav Petkov wrote:
> Hi Aravind,
>
> question: what's the story with MC?_MISC[IntP], is that bit still there?
> Because I don't see it in my BKDGs here.
Yep, It exists.
Maybe you are referring to Fam15h M0h BKDG? I think the bit was
introduced only from F15h M30h onwards.
The bit does *not* exist for bank=4, But-
if (bank ==4)
return true;
takes care of that.
> The background of the story is
>
> https://lkml.org/lkml/2014/10/7/84
>
> There's this thing we did at the time
>
> f227d4306cf3 ("x86, MCE, AMD: Make APIC LVT thresholding interrupt optional")
>
> which, AFAICR, is about some F15h versions having a counter but *not*
> generating a thresholding interrupt. Can you confirm that is still
> the case and we can have a counter but no interrupt gets generated on
> overflow?
>
So yes, moving the assignment inside the if condition should work just fine.
I see the patch on your 'ras-for-3.19' branch does not have this, so
I'll make this modification
to the branch before I test it.
Thanks,
-Aravind.
next prev parent reply other threads:[~2014-10-29 16:00 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-23 2:16 [PATCH] x86, MCE, AMD: use macros to compute bank MSRs Chen Yucong
2014-09-23 8:19 ` [PATCH] x86, MCE, AMD: save IA32_MCi_STATUS before machine_check_poll() resets it Chen Yucong
2014-09-28 8:15 ` Chen Yucong
2014-09-29 12:05 ` Borislav Petkov
2014-09-30 0:39 ` Chen Yucong
2014-09-30 7:25 ` Borislav Petkov
2014-09-30 9:56 ` Chen Yucong
2014-09-30 10:09 ` Borislav Petkov
2014-10-01 4:35 ` Chen Yucong
2014-10-02 13:12 ` Borislav Petkov
2014-10-02 14:37 ` Chen Yucong
[not found] ` <CAOjmkp9qQiTbqU3NUhUDAoQAa8wAPJnE_qXbDuBKrA3ee1_APQ@mail.gmail.com>
2014-10-08 21:52 ` Fwd: " Aravind Gopalakrishnan
2014-10-08 22:57 ` Borislav Petkov
2014-10-09 16:53 ` Aravind Gopalakrishnan
2014-10-09 17:35 ` Borislav Petkov
2014-10-09 19:01 ` Aravind Gopalakrishnan
2014-10-21 20:28 ` Borislav Petkov
2014-10-22 1:51 ` Chen Yucong
2014-10-22 8:16 ` Borislav Petkov
2014-10-22 8:53 ` Chen Yucong
2014-10-22 9:30 ` Borislav Petkov
2014-10-29 15:59 ` Aravind Gopalakrishnan [this message]
2014-10-30 19:04 ` Aravind Gopalakrishnan
2014-10-30 21:39 ` Borislav Petkov
2014-10-01 5:26 ` Chen Yucong
2014-10-01 10:10 ` Borislav Petkov
2014-09-28 8:09 ` [PATCH] x86, MCE, AMD: use macros to compute bank MSRs Chen Yucong
2014-09-29 11:48 ` Borislav Petkov
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