From: Paolo Bonzini <pbonzini@redhat.com>
To: "Radim Krčmář" <rkrcmar@redhat.com>, linux-kernel@vger.kernel.org
Cc: kvm@vger.kernel.org, Gleb Natapov <gleb@kernel.org>,
Marcelo Tosatti <mtosatti@redhat.com>
Subject: Re: [PATCH 0/3] kvm: APICv register write workaround
Date: Fri, 31 Oct 2014 16:06:49 +0100 [thread overview]
Message-ID: <5453A589.6040308@redhat.com> (raw)
In-Reply-To: <1414678007-9377-1-git-send-email-rkrcmar@redhat.com>
On 30/10/2014 15:06, Radim Krčmář wrote:
> APICv traps register writes, so we can't retrieve previous value, but
> our code depends on detecting changes.
Applied, thanks.
Paolo
> Apart from disabling APIC register virtualization, we can detect the
> change by using extra memory. One value history is enough, but we still
> don't want to keep it for every APIC register, for performance reasons.
> This leaves us with either a new framework, or exceptions ...
> The latter options fits KVM's path better [1,2].
>
> And when we already mirror a part of registers, optimizing access is
> acceptable [3]. (Squashed to keep bisecters happy.)
>
> ---
> Radim Krčmář (3):
> KVM: x86: detect SPIV changes under APICv
> KVM: x86: detect LVTT changes under APICv
> KVM: x86: optimize some accesses to LVTT and SPIV
>
> arch/x86/kvm/lapic.c | 32 +++++++++++++++++---------------
> arch/x86/kvm/lapic.h | 8 +++++---
> 2 files changed, 22 insertions(+), 18 deletions(-)
>
prev parent reply other threads:[~2014-10-31 15:06 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-30 14:06 [PATCH 0/3] kvm: APICv register write workaround Radim Krčmář
2014-10-30 14:06 ` [PATCH 1/3] KVM: x86: detect SPIV changes under APICv Radim Krčmář
2014-10-30 14:06 ` [PATCH 2/3] KVM: x86: detect LVTT " Radim Krčmář
2014-10-30 14:06 ` [PATCH 3/3] KVM: x86: optimize some accesses to LVTT and SPIV Radim Krčmář
2014-10-31 15:06 ` Paolo Bonzini [this message]
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