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From: David Daney <ddaney@caviumnetworks.com>
To: "Maciej W. Rozycki" <macro@linux-mips.org>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>,
	David Daney <ddaney.cavm@gmail.com>, <linux-mips@linux-mips.org>,
	Ralf Baechle <ralf@linux-mips.org>, <Zubair.Kakakhel@imgtec.com>,
	<geert+renesas@glider.be>, <peterz@infradead.org>,
	<paul.gortmaker@windriver.com>, <chenhc@lemote.com>,
	<cl@linux.com>, Ingo Molnar <mingo@kernel.org>, <richard@nod.at>,
	<zajec5@gmail.com>, <james.hogan@imgtec.com>,
	<keescook@chromium.org>, <tj@kernel.org>, <alex@alex-smith.me.uk>,
	<pbonzini@redhat.com>, <blogic@openwrt.org>,
	<paul.burton@imgtec.com>, <qais.yousef@imgtec.com>,
	<linux-kernel@vger.kernel.org>, <markos.chandras@imgtec.com>,
	<dengcheng.zhu@imgtec.com>, <manuel.lauss@gmail.com>,
	<lars.persson@axis.com>, David Daney <david.daney@cavium.com>
Subject: Re: [PATCH 2/3] MIPS: Add full ISA emulator.
Date: Thu, 4 Dec 2014 09:40:24 -0800	[thread overview]
Message-ID: <54809C88.8060601@caviumnetworks.com> (raw)
In-Reply-To: <alpine.LFD.2.11.1412040310100.22073@eddie.linux-mips.org>

On 12/04/2014 03:49 AM, Maciej W. Rozycki wrote:
> On Wed, 3 Dec 2014, David Daney wrote:
>
>>> but it doesn't support customized instructions,
>>
>> GCC will never put these in the delay slot of a FPU branch, so it is not
>> needed.
>>
>>> multiple ASEs,
>>
>> Same as above.  But any instructions that are deemed necessary can easily be
>> added.
>
>   GAS will happily schedule any instruction into a branch delay slot as
> long as the instruction is not architecturally forbidden there (e.g.
> ERET), there is no data dependency with the branch that would affect the
> result produced and the instruction is not an explicit exception trap
> operation (BREAK, SYSCALL, TEQ, etc.).  For some reason, unknown to me all
> MT ASE instructions are disallowed too.  Anything else -- free to go in!
>
>   Of course instructions can be scheduled into branch delay slots manually
> too, in handcoded assembly, and that has to continue working.
>

It is not difficult to also emulate the trapping instructions.  In order 
to move forward, I will implement the trapping instructions in my 
emulator for the next patch.

Thanks,
David Daney


  reply	other threads:[~2014-12-04 17:56 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-03 23:44 [PATCH 0/3] MIPS: Get ready for non-executable stack David Daney
2014-12-03 23:44 ` [PATCH 1/3] MIPS: Add FPU emulator counter for non-FPU instructions emulated David Daney
2014-12-03 23:44 ` [PATCH 2/3] MIPS: Add full ISA emulator David Daney
2014-12-03 23:55   ` Leonid Yegoshin
2014-12-04  0:20     ` David Daney
2014-12-04  0:52       ` Leonid Yegoshin
2014-12-04  1:29         ` David Daney
     [not found]           ` <547FBF63.70802@imgtec.com>
2014-12-04  2:21             ` David Daney
2014-12-04 10:16               ` Paul Burton
2014-12-04 10:45                 ` Qais Yousef
2014-12-04 11:49       ` Maciej W. Rozycki
2014-12-04 17:40         ` David Daney [this message]
2014-12-04 20:32           ` Maciej W. Rozycki
2014-12-03 23:44 ` [PATCH 3/3] MIPS: Use full instruction emulation for FPU emulator delay slot emulation David Daney

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