Re: Re: [PATCH] phy: add Rockchip RK3288 USB2 PHY driver.

[Yunzhi Li <lyz@rock-chips.com>]

Hi Heiko

> Am Mittwoch, 3. Dezember 2014, 21:46:50 schrieb LiYunzhi:
>> +
>> +};
>> +
>> +static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy,
>> +					   bool siddq)
>> +{
>> +	return regmap_write(phy->reg_base, phy->reg_offset,
>> +			    SIDDQ_MSK | (siddq ? SIDDQ_ON : SIDDQ_OFF));
> just for my understanding:
>
> You're using the SIDDQ bit, which supposedly "powers down all analog blocks"
> for IDDQ testing to control the phy power.
>
> What is the difference to usbotg_disable (bit 4 of uoc_con0) that is supposed
> to "power down the USB OTG/HOST block"?
>
> Similarly, where is the difference to usbotg_sleepm [uoc_con2 bit 10] combined
> with usbotg_common_on_n [uoc_con0 bit 0]?

SIDDQ: is used to power down the USB block analog function.
usbotg_disable: is used to diable USB digital interface, and USB analog
part is still alive.
The power consuming is total different.  Power(SIDDQ) <
Power(usbotg_disable).

usbotg_sleepm is defined in USB Low power mode - L1, this signal could
be used for USB 2.0 Link Power Management (LPM) addendum to the USB 2.0
specification, but our controller doesn't support. So we do not use
sleepm, this bit here just for debug force the transmitter enter the LPM
specific sleep mode.

usbotg_common_on_n: is used to control USB PHY internal PLL. When active
Low, the PLL is still alive in suspend mode, which could output 480M
clock for other IP use.

--------
Roy Li @ Rockchip