From: David Daney <ddaney@caviumnetworks.com>
To: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Aleksey Makarov <feumilieu@gmail.com>,
<linux-mips@linux-mips.org>, <linux-kernel@vger.kernel.org>,
David Daney <david.daney@cavium.com>,
Aleksey Makarov <aleksey.makarov@auriga.com>,
Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH 14/14] MIPS: OCTEON: Handle OCTEON III in csrc-octeon.
Date: Mon, 15 Dec 2014 13:29:28 -0800 [thread overview]
Message-ID: <548F52B8.7030606@caviumnetworks.com> (raw)
In-Reply-To: <20141215212422.GD10323@fuloong-minipc.musicnaut.iki.fi>
On 12/15/2014 01:24 PM, Aaro Koskinen wrote:
> Hi,
>
> On Mon, Dec 15, 2014 at 09:03:20PM +0300, Aleksey Makarov wrote:
>> if (current_cpu_type() == CPU_CAVIUM_OCTEON2) {
>> union cvmx_mio_rst_boot rst_boot;
>> +
>> rst_boot.u64 = cvmx_read_csr(CVMX_MIO_RST_BOOT);
>> rdiv = rst_boot.s.c_mul; /* CPU clock */
>> sdiv = rst_boot.s.pnr_mul; /* I/O clock */
>> f = (0x8000000000000000ull / sdiv) * 2;
>> + } else if (current_cpu_type() == CPU_CAVIUM_OCTEON3) {
>> + union cvmx_rst_boot rst_boot;
>> +
>> + rst_boot.u64 = cvmx_read_csr(CVMX_RST_BOOT);
>> + rdiv = rst_boot.s.c_mul; /* CPU clock */
>> + sdiv = rst_boot.s.pnr_mul; /* I/O clock */
>> + f = (0x8000000000000000ull / sdiv) * 2;
>> }
>
> The f = ... part could be moved outside the if blocks to avoid copy paste.
>
No, If you look at the rest of the file, you will find that there are
checks in the form:
if (f != 0) ...
There is a reason that we leave f with its default value of zero in some
of the cases.
David Daney
next prev parent reply other threads:[~2014-12-15 21:45 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-15 18:03 [PATCH 00/14] MIPS: OCTEON: Some partial support for Octeon III Aleksey Makarov
2014-12-15 18:03 ` [PATCH 01/14] MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs Aleksey Makarov
2014-12-15 18:03 ` [PATCH 02/14] MIPS: OCTEON: Fix FP context save Aleksey Makarov
2014-12-15 18:03 ` [PATCH 03/14] MIPS: OCTEON: Save and restore CP2 SHA3 state Aleksey Makarov
2014-12-15 18:03 ` [PATCH 04/14] MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register Aleksey Makarov
2014-12-15 18:03 ` [PATCH 05/14] MIPS: OCTEON: Delete unused COP2 saving code Aleksey Makarov
2014-12-15 18:03 ` [PATCH 06/14] MIPS: Remove unneeded #ifdef __KERNEL__ from asm/processor.h Aleksey Makarov
2014-12-15 18:03 ` [PATCH 07/14] MIPS: OCTEON: Implement the core-16057 workaround Aleksey Makarov
2014-12-15 18:03 ` [PATCH 08/14] MIPS: OCTEON: Don't do acknowledge operations for level triggered irqs Aleksey Makarov
2014-12-15 18:03 ` [PATCH 09/14] MIPS: OCTEON: Add ability to used an initrd from a named memory block Aleksey Makarov
2014-12-15 20:53 ` Aaro Koskinen
2014-12-17 14:47 ` Aleksey Makarov
2014-12-15 18:03 ` [PATCH 10/14] MIPS: OCTEON: Add little-endian support to asm/octeon/octeon.h Aleksey Makarov
2014-12-15 18:03 ` [PATCH 12/14] MIPS: OCTEON: Update octeon-model.h code for new SoCs Aleksey Makarov
2014-12-15 21:01 ` Aaro Koskinen
2014-12-16 18:24 ` David Daney
2014-12-15 18:03 ` [PATCH 13/14] MIPS: OCTEON: Add register definitions for OCTEON III reset unit Aleksey Makarov
2014-12-15 21:09 ` Aaro Koskinen
2014-12-15 21:31 ` David Daney
2014-12-15 22:07 ` Aaro Koskinen
2014-12-15 18:03 ` [PATCH 14/14] MIPS: OCTEON: Handle OCTEON III in csrc-octeon Aleksey Makarov
2014-12-15 21:24 ` Aaro Koskinen
2014-12-15 21:29 ` David Daney [this message]
2014-12-15 21:38 ` Aaro Koskinen
2014-12-16 18:26 ` [PATCH 00/14] MIPS: OCTEON: Some partial support for Octeon III David Daney
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