Re: [PATCH 0/5] Improvements to PCI hibernate path

[Mario Limonciello <superm1@kernel.org>]

On 4/27/26 15:34, Bjorn Helgaas wrote:
> On Sun, Apr 26, 2026 at 10:53:36PM -0500, Mario Limonciello (AMD) wrote:
>> A few cycles ago I sent out a kernel series for using the S4 paths when
>> the system goes to S5.  Some parts of it got merged, and Rafael suggested
>> to split the other parts into smaller pieces across multiple kernel cycles
>> to make bisecting easier.
>>
>> This fell into my backlog behind other things, so I wanted to try again
>> this cycle for the PCI pieces. I have been carrying it, rebasing it and
>> personally using it for a while now though.
>>
>> This series attempts to unify the PCI suspend and hibernate paths and to
>> fix some things that I observed to be wrong with how I expect hibernate
>> to work.
>>
>> It is based off 7.1-rc1 + Lukas' patch:
>> "PCI: Stop setting cached power state to "unknown" on unbind"
> 
> Hi Mario, would you mind posting a v2 that includes Lukas' patch, so
> the whole series applies cleanly so Sashiko can go through it?
> 
> I already applied Lukas' patch on pci/pm, but I guess Sashiko can't
> parse that dependency.

Bjorn,

Sure.  I'll repost with his patch front-loaded.  I assume you'll just 
drop that when applying if/when everything else looks good right?

FWIW, I did run review-prompts offline on the series already with Claude 
models so hopefully no new surprises when it runs with Google's models :P

Thanks,

> 
>> Mario Limonciello (AMD) (5):
>>    PCI/PM: Disable device wakeups when halting or powering off system
>>    PCI/PM: Split out code from pci_pm_suspend_noirq() into helper
>>    PCI/PM: Run bridge power up actions as part of restore phase
>>    PCI/PM: Use pci_power_manageable() in pci_pm_poweroff_noirq()
>>    PCI: Put PCIe bridges with downstream devices into D3 at hibernate
>>
>>   drivers/pci/pci-driver.c | 103 ++++++++++++++++++++++++++-------------
>>   1 file changed, 69 insertions(+), 34 deletions(-)
>>
>> -- 
>> 2.43.0
>>