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From: "Bryan O'Donoghue" <pure.logic@nexus-software.ie>
To: "Ong, Boon Leong" <boon.leong.ong@intel.com>
Cc: "tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"hpa@zytor.com" <hpa@zytor.com>,
	"x86@kernel.org" <x86@kernel.org>,
	"dvhart@infradead.org" <dvhart@infradead.org>,
	"platform-driver-x86@vger.kernel.org" 
	<platform-driver-x86@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"andy.shevchenko@gmail.com" <andy.shevchenko@gmail.com>
Subject: Re: [PATCH 2/2] platform/x86: Add Intel Galileo platform specific setup
Date: Fri, 09 Jan 2015 02:11:54 +0000	[thread overview]
Message-ID: <54AF38EA.6090005@nexus-software.ie> (raw)
In-Reply-To: <AF233D1473C1364ABD51D28909A1B1B7326E3282@PGSMSX105.gar.corp.intel.com>

On 09/01/15 01:00, Ong, Boon Leong wrote:

>> +static void __init
>> +intel_galileo_imr_sanity(unsigned long base, unsigned long size) {
>> +	/* Test zero zero */
>> +	if (imr_add(0, 0, 0, 0, true) == 0)
>> +		pr_err(SANITY "zero sized IMR @ 0x00000000\n");
>
> A side-discussion on imr_add():
> I would think that we should allow 1KiB IMR setting. Current imr_add() logic
> is prohibiting it.

Hi Boon Leong. Ermm, it does allow 1 KiB IMR regions. The following code 
works on the unmodifed V1 driver.

/* Test 1 KiB works */
idx = imr_add(0, IMR_ALIGN, IMR_READ_ACCESS_ALL,
               IMR_WRITE_ACCESS_ALL,false);
if (idx < 0)
	pr_err(SANITY "Couldn't add an IMR @ 0x%04x bytes\n", IMR_ALIGN);

Note IMR_ALIGN is 0x400

I'll add that test to the set of sanity tests in V2 just to put your 
mind at ease though.

 > So, the 'size' input should be at least 1KiB and imr_add()
 > internal logic will adjust 'hi' by -1KiB. Please consider ..

Hmm.

Actually I had a response all typed out for you why I didn't want an API 
to presume to modify the size of my input from the user's POV but, 
thinking about it twice - I agree with you.

V2 will subtract IMR_ALIGN (0x400) bytes from the size.

It's stupid to have to subtract IMR_ALIGN bytes on the input - and 
assumes the user of the API understands how the hardware works - but, of 
course the point of an API is so that the user of it doesn't *have* to 
understand that.

Good call.

--
BOD

  reply	other threads:[~2015-01-09  2:11 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-29 17:23 [PATCH 0/2] x86: Add IMR support to Quark/Galileo Bryan O'Donoghue
2014-12-29 17:23 ` [PATCH 1/2] x86: Add Isolated Memory Regions for Quark X1000 Bryan O'Donoghue
2014-12-31 15:05   ` Andy Shevchenko
2015-01-01 20:11     ` Bryan O'Donoghue
2015-01-06  7:36   ` Darren Hart
2015-01-06 13:43     ` Bryan O'Donoghue
2015-01-06 16:54       ` Darren Hart
2015-01-07 23:45       ` Ong, Boon Leong
2015-01-08 12:10         ` Bryan O'Donoghue
2015-01-08 14:52           ` Ong, Boon Leong
2015-01-08  0:04   ` Ong, Boon Leong
2015-01-08 13:08     ` Bryan O'Donoghue
2015-01-08 14:45       ` Ong, Boon Leong
2015-01-08 15:11         ` Bryan O'Donoghue
2015-01-09  3:44           ` Darren Hart
2014-12-29 17:23 ` [PATCH 2/2] platform/x86: Add Intel Galileo platform specific setup Bryan O'Donoghue
2014-12-31 15:25   ` Andy Shevchenko
2015-01-09  1:00   ` Ong, Boon Leong
2015-01-09  2:11     ` Bryan O'Donoghue [this message]
2015-01-09  4:46   ` Darren Hart
2015-01-09 11:17     ` Bryan O'Donoghue
2015-01-09 11:29       ` Bryan O'Donoghue
2015-01-09 14:11         ` Ong, Boon Leong
2015-01-10  6:54       ` Darren Hart
2015-01-11  1:53         ` Bryan O'Donoghue
2014-12-31 10:12 ` [PATCH 0/2] x86: Add IMR support to Quark/Galileo Andy Shevchenko
2014-12-31 11:59   ` Bryan O'Donoghue
2015-01-02  2:02   ` Darren Hart
2015-01-02  4:24 ` Darren Hart
2015-01-06  6:00 ` Darren Hart
2015-01-06 13:56   ` Bryan O'Donoghue
2015-01-06 16:48     ` Darren Hart
2015-01-06 17:23       ` Bryan O'Donoghue

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