From: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: Mike Turquette <mturquette@linaro.org>,
Tomeu Vizoso <tomeu.vizoso@collabora.com>,
Emilio L??pez <emilio@elopez.com.ar>,
linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] clk: composite: Set clk_core to composite rate and mux components
Date: Thu, 12 Feb 2015 14:27:25 +0100 [thread overview]
Message-ID: <54DCAA3D.6040805@collabora.co.uk> (raw)
In-Reply-To: <20150211185025.GC11190@codeaurora.org>
Hello Stephen,
On 02/11/2015 07:50 PM, Stephen Boyd wrote:
>> ---
>
> Thanks for the patch.
>
Thanks a lot for your feedback.
>>
>> Hello,
>>
>> I set the rate and mux components' .core in clk_composite_determine_rate()
>> because that is the least intrusive change and where the .clk field is set
>> too but I wonder if there is a reason to change the state of those clocks
>> in that function (which shouldn't have this side effect afaict) instead of
>> doing it in clk_register_composite().
>
> The reason we have to do it in the ops instead of during the
> registration phase is because some of these ops are called inside
> the clk_register() function.
>
Got it.
>>
>> drivers/clk/clk-composite.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
>> index dee81b83c4b3..2a53b9580ff7 100644
>> --- a/drivers/clk/clk-composite.c
>> +++ b/drivers/clk/clk-composite.c
>> @@ -75,6 +75,7 @@ static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
>>
>> if (rate_hw && rate_ops && rate_ops->determine_rate) {
>> rate_hw->clk = hw->clk;
>> + rate_hw->core = hw->core;
>> return rate_ops->determine_rate(rate_hw, rate, min_rate,
>> max_rate,
>> best_parent_rate,
>> @@ -121,6 +122,7 @@ static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
>> return best_rate;
>> } else if (mux_hw && mux_ops && mux_ops->determine_rate) {
>> mux_hw->clk = hw->clk;
>> + mux_hw->core = hw->core;
>> return mux_ops->determine_rate(mux_hw, rate, min_rate,
>> max_rate, best_parent_rate,
>> best_parent_p);
>
> We need to assign the core pointer wherever we assign the clk
> pointer. That seems to be quite a few more places than two.
>
Yes, I found more places in other drivers so I wrote a small coccinelle
script to replace those using a semantic patch. Also I created a inline
function to wrap the assignments since we will have to change it again
once the clk_core is dropped.
Best regards,
Javier
prev parent reply other threads:[~2015-02-12 13:27 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-11 10:13 [PATCH 0/2] clk: Some fixes for the per-user clk API changes Javier Martinez Canillas
2015-02-11 10:13 ` [PATCH 1/2] clk: Don't dereference parent clock if is NULL Javier Martinez Canillas
2015-02-11 18:54 ` Stephen Boyd
2015-02-12 13:35 ` Javier Martinez Canillas
2015-02-11 10:13 ` [PATCH 2/2] clk: composite: Set clk_core to composite rate and mux components Javier Martinez Canillas
2015-02-11 18:50 ` Stephen Boyd
2015-02-12 13:27 ` Javier Martinez Canillas [this message]
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