Re: [PATCH] net: macb: Add big endian CPU support

Arun Chandran
2015-02-24T17:57:54Z

On Tue, Feb 24, 2015 at 6:27 PM, Nicolas Ferre <nicolas.ferre@atmel.com> wrote:
> Le 24/02/2015 08:39, Arun Chandran a écrit :
>> This patch converts all __raw_readl and __raw_writel function calls
>> to their corresponding readl_relaxed and writel_relaxed variants.
>>
>> It also tells the driver to set ahb_endian_swp_mgmt_en bit in dma_cfg
>> when the cpu is configured in big endian mode.
>>
>> Signed-off-by: Arun Chandran <achandran@mvista.com>
>> ---
>> This patch is tested on xilinx ZC702 evaluation board with
>> CONFIG_CPU_BIG_ENDIAN=y and booting NFS rootfs
>> Added on the fly IP endianness detection according to
>> comments from Michal Simek.
>> ---
>> ---
>> drivers/net/ethernet/cadence/macb.c | 33 +++++++++++++++++++++++++++------
>> drivers/net/ethernet/cadence/macb.h | 15 ++++++++-------
>> 2 files changed, 35 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
>> index ad76b8e..1642911 100644
>> --- a/drivers/net/ethernet/cadence/macb.c
>> +++ b/drivers/net/ethernet/cadence/macb.c
>> @@ -449,7 +449,7 @@ static void macb_update_stats(struct macb *bp)
>> WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4);
>>
>> for(; p < end; p++, reg++)
>> - *p += __raw_readl(reg);
>> + *p += readl_relaxed(reg);
>> }
>>
>> static int macb_halt_tx(struct macb *bp)
>> @@ -1578,6 +1578,7 @@ static u32 macb_dbw(struct macb *bp)
>> static void macb_configure_dma(struct macb *bp)
>> {
>> u32 dmacfg;
>> + u32 tmp, ncr;
>>
>> if (macb_is_gem(bp)) {
>> dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L);
>> @@ -1585,7 +1586,25 @@ static void macb_configure_dma(struct macb *bp)
>> if (bp->dma_burst_length)
>> dmacfg = GEM_BFINS(FBLDO, bp->dma_burst_length, dmacfg);
>> dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L);
>> - dmacfg &= ~GEM_BIT(ENDIA);
>> + dmacfg &= ~GEM_BIT(ENDIA_PKT);
>
> I think this will fail... (see below)
>
>> +
>> + /* Here we use the loopback bit of net_ctrl register to detect
>> + * endianness on IP. save it first. Program swaped mode for
>> + * management descriptor accesses if writing to loop back bit
>> + * and reading it back brings no change in bit value.
>> + */
>> + ncr = macb_readl(bp, NCR);
>> + __raw_writel(MACB_BIT(LLB), bp->regs + MACB_NCR);
>> + tmp = __raw_readl(bp->regs + MACB_NCR);
>> +
>> + if (tmp == MACB_BIT(LLB))
>> + dmacfg &= ~GEM_BIT(ENDIA_DESC);
>
> Ditto
>
>> + else
>> + dmacfg |= GEM_BIT(ENDIA_DESC);
>
> Ditto

Actually GEM_BIT(ENDIA_DESC) won't fail as I have defined
GEM_ENDIA_DESC_OFFSET. But I failed to notice others (GEM_BF*)

I will send another version. Thank you for spotting it.

--Arun