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From: Juergen Gross <jgross@suse.com>
To: Ingo Molnar <mingo@kernel.org>,
	"Luis R. Rodriguez" <mcgrof@do-not-panic.com>
Cc: gregkh@linuxfoundation.org, akpm@linux-foundation.org,
	tony@atomide.com, tglx@linutronix.de, mingo@redhat.com,
	hpa@zytor.com, luto@amacapital.net, toshi.kani@hp.com,
	dave.hansen@linux.intel.com, JBeulich@suse.com, pavel@ucw.cz,
	qiuxishi@huawei.com, david.vrabel@citrix.com, bp@suse.de,
	vbabka@suse.cz, iamjoonsoo.kim@lge.com, decui@microsoft.com,
	linux-kernel@vger.kernel.org, x86@kernel.org,
	julia.lawall@lip6.fr, "Luis R. Rodriguez" <mcgrof@suse.com>
Subject: Re: [PATCH] x86/mm/pat: Initialize __cachemode2pte_tbl[] and __pte2cachemode_tbl[] in a bit more readable fashion
Date: Thu, 05 Mar 2015 09:42:20 +0100	[thread overview]
Message-ID: <54F816EC.3090803@suse.com> (raw)
In-Reply-To: <20150305082135.GB5969@gmail.com>

On 03/05/2015 09:21 AM, Ingo Molnar wrote:
>
> ( So this patch is not directly related to gbpages, but while reading
>    arch/x86/mm/init.c I could not resist ... )
>
> =======================>
>
> The initialization of these two arrays is a bit difficult to follow:
> restructure it optically so that a 2D structure shows which bit in
> the PTE is set and which not.
>
> Also improve on comments a bit.
>
> No code or data changed:
>
>    # arch/x86/mm/init.o:
>
>     text    data     bss     dec     hex filename
>     4585     424   29776   34785    87e1 init.o.before
>     4585     424   29776   34785    87e1 init.o.after
>
> md5:
>     a82e11ff58bcfd0af3a94662a701f65d  init.o.before.asm
>     a82e11ff58bcfd0af3a94662a701f65d  init.o.after.asm
>
> Cc: Andy Lutomirski <luto@amacapital.net>
> Cc: Dave Hansen <dave.hansen@linux.intel.com>
> Cc: Jan Beulich <JBeulich@suse.com>
> Cc: Juergen Gross <jgross@suse.com>
> Cc: Linus Torvalds <torvalds@linux-foundation.org>
> Cc: Luis R. Rodriguez <mcgrof@suse.com>
> Cc: Toshi Kani <toshi.kani@hp.com>
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Ingo Molnar <mingo@kernel.org>

Reviewed-by: Juergen Gross <jgross@suse.com>

> ---
>   arch/x86/mm/init.c | 40 ++++++++++++++++++++++------------------
>   1 file changed, 22 insertions(+), 18 deletions(-)
>
> diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
> index 6dc85d51cd98..4469563f8c3b 100644
> --- a/arch/x86/mm/init.c
> +++ b/arch/x86/mm/init.c
> @@ -29,29 +29,33 @@
>
>   /*
>    * Tables translating between page_cache_type_t and pte encoding.
> - * Minimal supported modes are defined statically, modified if more supported
> - * cache modes are available.
> - * Index into __cachemode2pte_tbl is the cachemode.
> - * Index into __pte2cachemode_tbl are the caching attribute bits of the pte
> - * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
> + *
> + * Minimal supported modes are defined statically, they are modified
> + * during bootup if more supported cache modes are available.
> + *
> + *   Index into __cachemode2pte_tbl[] is the cachemode.
> + *
> + *   Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
> + *   (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
>    */
>   uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
> -	[_PAGE_CACHE_MODE_WB]		= 0,
> -	[_PAGE_CACHE_MODE_WC]		= _PAGE_PWT,
> -	[_PAGE_CACHE_MODE_UC_MINUS]	= _PAGE_PCD,
> -	[_PAGE_CACHE_MODE_UC]		= _PAGE_PCD | _PAGE_PWT,
> -	[_PAGE_CACHE_MODE_WT]		= _PAGE_PCD,
> -	[_PAGE_CACHE_MODE_WP]		= _PAGE_PCD,
> +	[_PAGE_CACHE_MODE_WB      ]	= 0         | 0        ,
> +	[_PAGE_CACHE_MODE_WC      ]	= _PAGE_PWT | 0        ,
> +	[_PAGE_CACHE_MODE_UC_MINUS]	= 0         | _PAGE_PCD,
> +	[_PAGE_CACHE_MODE_UC      ]	= _PAGE_PWT | _PAGE_PCD,
> +	[_PAGE_CACHE_MODE_WT      ]	= 0         | _PAGE_PCD,
> +	[_PAGE_CACHE_MODE_WP      ]	= 0         | _PAGE_PCD,
>   };
>   EXPORT_SYMBOL(__cachemode2pte_tbl);
> +
>   uint8_t __pte2cachemode_tbl[8] = {
> -	[__pte2cm_idx(0)] = _PAGE_CACHE_MODE_WB,
> -	[__pte2cm_idx(_PAGE_PWT)] = _PAGE_CACHE_MODE_WC,
> -	[__pte2cm_idx(_PAGE_PCD)] = _PAGE_CACHE_MODE_UC_MINUS,
> -	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD)] = _PAGE_CACHE_MODE_UC,
> -	[__pte2cm_idx(_PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
> -	[__pte2cm_idx(_PAGE_PWT | _PAGE_PAT)] = _PAGE_CACHE_MODE_WC,
> -	[__pte2cm_idx(_PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
> +	[__pte2cm_idx( 0        | 0         | 0        )] = _PAGE_CACHE_MODE_WB,
> +	[__pte2cm_idx(_PAGE_PWT | 0         | 0        )] = _PAGE_CACHE_MODE_WC,
> +	[__pte2cm_idx( 0        | _PAGE_PCD | 0        )] = _PAGE_CACHE_MODE_UC_MINUS,
> +	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0        )] = _PAGE_CACHE_MODE_UC,
> +	[__pte2cm_idx( 0        | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
> +	[__pte2cm_idx(_PAGE_PWT | 0         | _PAGE_PAT)] = _PAGE_CACHE_MODE_WC,
> +	[__pte2cm_idx(0         | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
>   	[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
>   };
>   EXPORT_SYMBOL(__pte2cachemode_tbl);
> --
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>


  reply	other threads:[~2015-03-05  8:42 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-05  1:24 [RFC v1 0/4] x86: simpify direct_gbpages setting, add early_param_on_off() Luis R. Rodriguez
2015-03-05  1:24 ` [RFC v1 1/4] x86: mm: use IS_ENABLED() for direct_gbpages Luis R. Rodriguez
2015-03-05 11:49   ` [tip:x86/mm] x86/mm: Use " tip-bot for Luis R. Rodriguez
2015-03-05  1:24 ` [RFC v1 2/4] x86: mm: simplify enabling direct_gbpages Luis R. Rodriguez
2015-03-05 11:49   ` [tip:x86/mm] x86/mm: Simplify " tip-bot for Luis R. Rodriguez
2015-03-05  1:24 ` [RFC v1 3/4] init.h: add early_param_on_off() Luis R. Rodriguez
2015-03-05 11:50   ` [tip:x86/mm] init.h: Add early_param_on_off() tip-bot for Luis R. Rodriguez
2015-03-05  1:24 ` [RFC v1 4/4] x86: mm: use early_param_on_off() for direct_gbpages Luis R. Rodriguez
2015-03-05 11:50   ` [tip:x86/mm] x86/mm: Use " tip-bot for Luis R. Rodriguez
2015-03-05  7:23 ` [PATCH 5/4] x86/mm: Further simplify 1 GB kernel linear mappings handling Ingo Molnar
2015-03-05  8:05   ` Jan Beulich
2015-03-05  8:23     ` Ingo Molnar
2015-03-05  7:27 ` [PATCH 6/4] x86/mm: Simplify probe_page_size_mask() Ingo Molnar
2015-03-05  8:38   ` Juergen Gross
2015-03-05  8:47     ` Ingo Molnar
2015-03-05  7:44 ` [PATCH 7/4] init.h: Clean up the __setup()/early_param() macros Ingo Molnar
2015-03-05  8:21 ` [PATCH] x86/mm/pat: Initialize __cachemode2pte_tbl[] and __pte2cachemode_tbl[] in a bit more readable fashion Ingo Molnar
2015-03-05  8:42   ` Juergen Gross [this message]
2015-03-05 11:51   ` [tip:x86/mm] " tip-bot for Ingo Molnar

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