From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: Ryan.Wanner@microchip.com, mturquette@baylibre.com,
sboyd@kernel.org, nicolas.ferre@microchip.com,
alexandre.belloni@bootlin.com
Cc: robh@kernel.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, varshini.rajendran@microchip.com
Subject: Re: [PATCH v2 21/32] clk: at91: sama5d2: switch to parent_hw and parent_data
Date: Mon, 7 Jul 2025 16:21:36 +0300 [thread overview]
Message-ID: <54ceeadf-504e-42f6-8b0c-05269d18c44e@tuxon.dev> (raw)
In-Reply-To: <6df068977c06a23b503bd9191a2a6cab880c9a1e.1750182562.git.Ryan.Wanner@microchip.com>
Hi, Ryan,
On 24.06.2025 18:08, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Switch SAMA5D2 clocks to use parent_hw and parent_data. Having
> parent_hw instead of parent names improves to clock registration
> speed and re-parenting. Extra time saved on registration is
> ~410us when running at 492MHz.
Have you re-check this? I expected to no longer be valid.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/sama5d2.c | 168 +++++++++++++++++++------------------
> 1 file changed, 86 insertions(+), 82 deletions(-)
>
> diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
> index 8bbc34e22cda..538ffb8deedb 100644
> --- a/drivers/clk/at91/sama5d2.c
> +++ b/drivers/clk/at91/sama5d2.c
> @@ -37,9 +37,9 @@ static const struct clk_pcr_layout sama5d2_pcr_layout = {
> .pid_mask = GENMASK(6, 0),
> };
>
> -static const struct {
> +static struct {
> char *n;
> - char *p;
> + struct clk_hw *parent_hw;
> unsigned long flags;
> u8 id;
> } sama5d2_systemck[] = {
> @@ -47,14 +47,14 @@ static const struct {
> * ddrck feeds DDR controller and is enabled by bootloader thus we need
> * to keep it enabled in case there is no Linux consumer for it.
> */
> - { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
> - { .n = "lcdck", .p = "masterck_div", .id = 3 },
> - { .n = "uhpck", .p = "usbck", .id = 6 },
> - { .n = "udpck", .p = "usbck", .id = 7 },
> - { .n = "pck0", .p = "prog0", .id = 8 },
> - { .n = "pck1", .p = "prog1", .id = 9 },
> - { .n = "pck2", .p = "prog2", .id = 10 },
> - { .n = "iscck", .p = "masterck_div", .id = 18 },
> + { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
> + { .n = "lcdck", .id = 3 },
> + { .n = "uhpck", .id = 6 },
> + { .n = "udpck", .id = 7 },
> + { .n = "pck0", .id = 8 },
> + { .n = "pck1", .id = 9 },
> + { .n = "pck2", .id = 10 },
> + { .n = "iscck", .id = 18 },
> };
>
> static const struct {
> @@ -164,25 +164,15 @@ static const struct clk_programmable_layout sama5d2_programmable_layout = {
>
> static void __init sama5d2_pmc_setup(struct device_node *np)
> {
> + struct clk_hw *hw, *audio_fracck_hw, *usbck_hw, *main_rc_hw, *main_osc_hw;
> + const char *slow_clk_name = "slowck", *main_xtal_name = "main_xtal";
> + u8 slow_clk_index = 0, main_xtal_index = 1;
> struct clk_range range = CLK_RANGE(0, 0);
> - const char *slck_name, *mainxtal_name;
> - struct pmc_data *sama5d2_pmc;
> - const char *parent_names[6];
> + struct clk_parent_data parent_data[6];
> struct regmap *regmap, *regmap_sfr;
> - struct clk_hw *hw;
> - int i;
> + struct pmc_data *sama5d2_pmc;
> bool bypass;
> -
> - i = of_property_match_string(np, "clock-names", "slow_clk");
> - if (i < 0)
> - return;
> -
> - slck_name = of_clk_get_parent_name(np, i);
> -
> - i = of_property_match_string(np, "clock-names", "main_xtal");
> - if (i < 0)
> - return;
> - mainxtal_name = of_clk_get_parent_name(np, i);
> + int i;
>
> regmap = device_node_to_regmap(np);
> if (IS_ERR(regmap))
> @@ -195,51 +185,52 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
> if (!sama5d2_pmc)
> return;
>
> - hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
> - 100000000);
> - if (IS_ERR(hw))
> + main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
> + 100000000);
> + if (IS_ERR(main_rc_hw))
> goto err_free;
>
> bypass = of_property_read_bool(np, "atmel,osc-bypass");
>
> - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
> - bypass);
> - if (IS_ERR(hw))
> + main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
> + &AT91_CLK_PD_NAME(main_xtal_name, main_xtal_index),
> + bypass);
> + if (IS_ERR(main_osc_hw))
> goto err_free;
>
> - parent_names[0] = "main_rc_osc";
> - parent_names[1] = "main_osc";
> - hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
> + parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
> + parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
> + hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
> if (IS_ERR(hw))
> goto err_free;
>
> sama5d2_pmc->chws[PMC_MAIN] = hw;
> -
> - hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
> + hw = at91_clk_register_pll(regmap, "pllack", NULL,
> + &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]), 0,
> &sama5d3_pll_layout, &plla_characteristics);
> if (IS_ERR(hw))
> goto err_free;
>
> - hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack");
> + hw = at91_clk_register_plldiv(regmap, "plladivck", NULL, &AT91_CLK_PD_HW(hw));
> if (IS_ERR(hw))
> goto err_free;
>
> sama5d2_pmc->chws[PMC_PLLACK] = hw;
>
> - hw = at91_clk_register_audio_pll_frac(regmap, "audiopll_fracck",
> - "mainck");
> - if (IS_ERR(hw))
> + audio_fracck_hw = at91_clk_register_audio_pll_frac(regmap, "audiopll_fracck", NULL,
> + &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]));
> + if (IS_ERR(audio_fracck_hw))
> goto err_free;
>
> - hw = at91_clk_register_audio_pll_pad(regmap, "audiopll_padck",
> - "audiopll_fracck");
> + hw = at91_clk_register_audio_pll_pad(regmap, "audiopll_padck", NULL,
> + &AT91_CLK_PD_HW(audio_fracck_hw));
> if (IS_ERR(hw))
> goto err_free;
>
> sama5d2_pmc->chws[PMC_AUDIOPINCK] = hw;
>
> - hw = at91_clk_register_audio_pll_pmc(regmap, "audiopll_pmcck",
> - "audiopll_fracck");
> + hw = at91_clk_register_audio_pll_pmc(regmap, "audiopll_pmcck", NULL,
> + &AT91_CLK_PD_HW(audio_fracck_hw));
> if (IS_ERR(hw))
> goto err_free;
>
> @@ -249,25 +240,26 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
> if (IS_ERR(regmap_sfr))
> regmap_sfr = NULL;
>
> - hw = at91_clk_register_utmi(regmap, regmap_sfr, "utmick", "mainck", NULL);
> + hw = at91_clk_register_utmi(regmap, regmap_sfr, "utmick", NULL,
> + &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]));
> if (IS_ERR(hw))
> goto err_free;
>
> sama5d2_pmc->chws[PMC_UTMI] = hw;
>
> - parent_names[0] = slck_name;
> - parent_names[1] = "mainck";
> - parent_names[2] = "plladivck";
> - parent_names[3] = "utmick";
> + parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name, slow_clk_index);
> + parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]);
> + parent_data[2] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_PLLACK]);
> + parent_data[3] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_UTMI]);
> hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
> - parent_names, NULL,
> + NULL, parent_data,
> &at91sam9x5_master_layout,
> &mck_characteristics, &mck_lock);
> if (IS_ERR(hw))
> goto err_free;
>
> - hw = at91_clk_register_master_div(regmap, "masterck_div",
> - "masterck_pres", NULL,
> + hw = at91_clk_register_master_div(regmap, "masterck_div", NULL,
> + &AT91_CLK_PD_HW(hw),
> &at91sam9x5_master_layout,
> &mck_characteristics, &mck_lock,
> CLK_SET_RATE_GATE, 0);
> @@ -276,31 +268,32 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
>
> sama5d2_pmc->chws[PMC_MCK] = hw;
>
> - hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div");
> + hw = at91_clk_register_h32mx(regmap, "h32mxck", NULL,
> + &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK]));
> if (IS_ERR(hw))
> goto err_free;
>
> sama5d2_pmc->chws[PMC_MCK2] = hw;
>
> - parent_names[0] = "plladivck";
> - parent_names[1] = "utmick";
> - hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
> - if (IS_ERR(hw))
> + parent_data[0] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_PLLACK]);
> + parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_UTMI]);
> + usbck_hw = at91sam9x5_clk_register_usb(regmap, "usbck", NULL, parent_data, 2);
> + if (IS_ERR(usbck_hw))
> goto err_free;
>
> - parent_names[0] = slck_name;
> - parent_names[1] = "mainck";
> - parent_names[2] = "plladivck";
> - parent_names[3] = "utmick";
> - parent_names[4] = "masterck_div";
> - parent_names[5] = "audiopll_pmcck";
> + parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name, slow_clk_index);
> + parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]);
> + parent_data[2] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_PLLACK]);
> + parent_data[3] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_UTMI]);
> + parent_data[4] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK]);
> + parent_data[5] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_AUDIOPLLCK]);
> for (i = 0; i < 3; i++) {
> char name[6];
>
> snprintf(name, sizeof(name), "prog%d", i);
>
> hw = at91_clk_register_programmable(regmap, name,
> - parent_names, NULL, 6, i,
> + NULL, parent_data, 6, i,
> &sama5d2_programmable_layout,
> NULL);
> if (IS_ERR(hw))
> @@ -309,9 +302,18 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
> sama5d2_pmc->pchws[i] = hw;
> }
>
> + /* Set systemck parent hws. */
> + sama5d2_systemck[0].parent_hw = sama5d2_pmc->chws[PMC_MCK];
> + sama5d2_systemck[1].parent_hw = sama5d2_pmc->chws[PMC_MCK];
> + sama5d2_systemck[2].parent_hw = usbck_hw;
> + sama5d2_systemck[3].parent_hw = usbck_hw;
> + sama5d2_systemck[4].parent_hw = sama5d2_pmc->pchws[0];
> + sama5d2_systemck[5].parent_hw = sama5d2_pmc->pchws[1];
> + sama5d2_systemck[6].parent_hw = sama5d2_pmc->pchws[2];
> + sama5d2_systemck[7].parent_hw = sama5d2_pmc->chws[PMC_MCK];
> for (i = 0; i < ARRAY_SIZE(sama5d2_systemck); i++) {
> - hw = at91_clk_register_system(regmap, sama5d2_systemck[i].n,
> - sama5d2_systemck[i].p, NULL,
> + hw = at91_clk_register_system(regmap, sama5d2_systemck[i].n, NULL,
> + &AT91_CLK_PD_HW(sama5d2_systemck[i].parent_hw),
> sama5d2_systemck[i].id,
> sama5d2_systemck[i].flags);
> if (IS_ERR(hw))
> @@ -324,7 +326,8 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
> hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
> &sama5d2_pcr_layout,
> sama5d2_periphck[i].n,
> - "masterck_div", NULL,
> + NULL,
> + &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK]),
> sama5d2_periphck[i].id,
> &range, INT_MIN,
> sama5d2_periphck[i].flags);
> @@ -338,7 +341,8 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
> hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
> &sama5d2_pcr_layout,
> sama5d2_periph32ck[i].n,
> - "h32mxck", NULL,
> + NULL,
> + &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK2]),
> sama5d2_periph32ck[i].id,
> &sama5d2_periph32ck[i].r,
> INT_MIN, 0);
> @@ -348,17 +352,17 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
> sama5d2_pmc->phws[sama5d2_periph32ck[i].id] = hw;
> }
>
> - parent_names[0] = slck_name;
> - parent_names[1] = "mainck";
> - parent_names[2] = "plladivck";
> - parent_names[3] = "utmick";
> - parent_names[4] = "masterck_div";
> - parent_names[5] = "audiopll_pmcck";
> + parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name, slow_clk_index);
> + parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]);
> + parent_data[2] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_PLLACK]);
> + parent_data[3] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_UTMI]);
> + parent_data[4] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK]);
> + parent_data[5] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_AUDIOPLLCK]);
> for (i = 0; i < ARRAY_SIZE(sama5d2_gck); i++) {
> hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
> &sama5d2_pcr_layout,
> sama5d2_gck[i].n,
> - parent_names, NULL, NULL, 6,
> + NULL, parent_data, NULL, 6,
> sama5d2_gck[i].id,
> &sama5d2_gck[i].r,
> sama5d2_gck[i].chg_pid);
> @@ -369,19 +373,19 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
> }
>
> if (regmap_sfr) {
> - parent_names[0] = "i2s0_clk";
> - parent_names[1] = "i2s0_gclk";
> + parent_data[0] = AT91_CLK_PD_HW(sama5d2_pmc->phws[54]); /* i2s0_clk */
> + parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->ghws[54]); /* i2s0_gclk */
> hw = at91_clk_i2s_mux_register(regmap_sfr, "i2s0_muxclk",
> - parent_names, 2, 0);
> + NULL, parent_data, 2, 0);
> if (IS_ERR(hw))
> goto err_free;
>
> sama5d2_pmc->chws[PMC_I2S0_MUX] = hw;
>
> - parent_names[0] = "i2s1_clk";
> - parent_names[1] = "i2s1_gclk";
> + parent_data[0] = AT91_CLK_PD_HW(sama5d2_pmc->phws[55]); /* i2s1_clk */
> + parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->ghws[55]); /* i2s1_gclk */
> hw = at91_clk_i2s_mux_register(regmap_sfr, "i2s1_muxclk",
> - parent_names, 2, 1);
> + NULL, parent_data, 2, 1);
> if (IS_ERR(hw))
> goto err_free;
>
next prev parent reply other threads:[~2025-07-07 13:21 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-24 15:07 [PATCH v2 00/32] clk: at91: add support for parent_data and Ryan.Wanner
2025-06-24 15:07 ` [PATCH v2 01/32] clk: at91: pmc: add macros for clk_parent_data Ryan.Wanner
2025-06-24 15:07 ` [PATCH v2 02/32] clk: at91: pmc: Move macro to header file Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 03/32] clk: at91: clk-sam9x60-pll: use clk_parent_data Ryan.Wanner
2025-07-07 13:21 ` Claudiu Beznea
2025-07-07 15:24 ` Ryan Wanner
2025-07-08 10:05 ` Claudiu Beznea
2025-06-24 15:08 ` [PATCH v2 04/32] clk: at91: clk-peripheral: switch to clk_parent_data Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 05/32] clk: at91: clk-main: switch to clk parent data Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 06/32] clk: at91: clk-utmi: use clk_parent_data Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 07/32] clk: at91: clk-master: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 08/32] clk: at91: clk-programmable: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 09/32] clk: at91: clk-generated: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 10/32] clk: at91: clk-usb: add support for clk_parent_data Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 11/32] clk: at91: clk-system: use clk_parent_data Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 12/32] clk: at91: clk-pll: add support for parent_hw Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 13/32] clk: at91: clk-audio-pll: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 14/32] clk: at91: clk-plldiv: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 15/32] clk: at91: clk-h32mx: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 16/32] clk: at91: clk-i2s-mux: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 17/32] clk: at91: clk-smd: add support for clk_parent_data Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 18/32] clk: at91: clk-slow: add support for parent_hw Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 19/32] clk: at91: dt-compat: switch to parent_hw and parent_data Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 20/32] clk: at91: sam9x60: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 21/32] clk: at91: sama5d2: " Ryan.Wanner
2025-07-07 13:21 ` Claudiu Beznea [this message]
2025-06-24 15:08 ` [PATCH v2 22/32] clk: at91: sama5d3: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 23/32] clk: at91: sama5d4: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 24/32] clk: at91: at91sam9x5: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 25/32] clk: at91: at91rm9200: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 26/32] clk: at91: at91sam9260: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 27/32] clk: at91: at91sam9g45: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 28/32] clk: at91: at91sam9n12: " Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 29/32] clk: at91: at91sam9rl: switch to clk_parent_data Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 30/32] clk: at91: sam9x75: switch to parent_hw and parent_data Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 31/32] clk: at91: sama7g5: switch to clk_parent_data Ryan.Wanner
2025-06-24 15:08 ` [PATCH v2 32/32] clk: at91: sama7d65: " Ryan.Wanner
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