From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754114AbbCLNAg (ORCPT ); Thu, 12 Mar 2015 09:00:36 -0400 Received: from mailout2.w1.samsung.com ([210.118.77.12]:26803 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753602AbbCLNAb (ORCPT ); Thu, 12 Mar 2015 09:00:31 -0400 X-AuditID: cbfec7f4-b7f126d000001e9a-11-55018d5a8f36 Message-id: <55018DD7.2010608@samsung.com> Date: Thu, 12 Mar 2015 14:00:07 +0100 From: Sylwester Nawrocki User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.1.2 MIME-version: 1.0 To: linux-samsung-soc@vger.kernel.org, Kukjin Kim Cc: Andrzej Hajda , Marek Szyprowski , Kyungmin Park , javier.martinez@collabora.co.uk, Liquid.Acid@gmx.net, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel Subject: Re: [RFC PATCH v2 3/3] ARM: dts: exynos5420: add async-bridge clocks to disp1 power domain References: <54D48701.10105@collabora.co.uk> <1423220154-5333-1-git-send-email-a.hajda@samsung.com> In-reply-to: <1423220154-5333-1-git-send-email-a.hajda@samsung.com> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrBLMWRmVeSWpSXmKPExsVy+t/xq7pRvYyhBgt/KVvcWneO1WL+ESBx 5et7Noujvwss+h+/ZrY42/SG3WLT42usFpd3zWGzmHF+H5NF18+fbBZrj9xld+D2+Pv8OovH 4k372Tw2repk87jffZzJY/OSeo++LasYPT5vkgtgj+KySUnNySxLLdK3S+DKeHv2B3PBZ76K JScOMDcwdvF0MXJySAiYSDw8eJsNwhaTuHBvPZDNxSEksJRR4uiuD0wQzidGiYZzP9hBqngF tCTOrLoI1sEioCpx4+cOZhCbTcBQovdoHyOILSoQIXHy7h6oekGJH5PvsXQxcnCICLhIvD9T CzKTWeAyk8SB2UfBaoQFUiU+vN7OCmILAdm7t0xnArE5BZwlvm+dxwjSyyygJ3H/ohZImFlA XmLzmrfMExgFZiHZMAuhahaSqgWMzKsYRVNLkwuKk9JzDfWKE3OLS/PS9ZLzczcxQmLjyw7G xcesDjEKcDAq8fBG9DGECrEmlhVX5h5ilOBgVhLhLW1nDBXiTUmsrEotyo8vKs1JLT7EyMTB KdXAaCqwNkviDCPvvgURTR/WvPovefNRYxHzkR2da9pOhH2K8r/U4qTT/q0zq6DT5G/Ykj7n RQ09nMmGq9/VNsnomFbKnXhzVuP2iRT2mYv87RNOz8hg6Kzj65CsnatatdVzwc0t1noLUn33 uj/e9oCB9wKDsFWF1t3SC7XnTDonLr61gvlBYyGzEktxRqKhFnNRcSIAynYI8GsCAAA= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 06/02/15 11:55, Andrzej Hajda wrote: > FIMD and MIXER IPs in disp1 power domain have async-bridges (to GSCALER), > therefore their clocks should be enabled during power domain switch. > > Signed-off-by: Andrzej Hajda > --- > arch/arm/boot/dts/exynos5420.dtsi | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi > index e1fa800..58579f5 100644 > --- a/arch/arm/boot/dts/exynos5420.dtsi > +++ b/arch/arm/boot/dts/exynos5420.dtsi > @@ -293,9 +293,11 @@ > <&clock CLK_MOUT_SW_ACLK300>, > <&clock CLK_MOUT_USER_ACLK300_DISP1>, > <&clock CLK_MOUT_SW_ACLK400>, > - <&clock CLK_MOUT_USER_ACLK400_DISP1>; > + <&clock CLK_MOUT_USER_ACLK400_DISP1>, > + <&clock CLK_FIMD1>, <&clock CLK_MIXER>; > clock-names = "oscclk", "pclk0", "clk0", > - "pclk1", "clk1", "pclk2", "clk2"; > + "pclk1", "clk1", "pclk2", "clk2", > + "asb0", "asb1"; > }; In general I don't like those clock/clock-names properties in the power domain nodes, since the power domains are not really consumers of those clocks. However these clocks are essential for the exynos power domains operation. There are more dependencies between the clocks and the power domains which adding of those properties does not cover. And we'll need to address those dependencies somehow. Anyway, the subject patch looks OK to me, given that support for clocks/ clock-names in the exynos power domain device nodes has been merged for quite long already. The entire feature has been merged without PM or clk subsystem maintainer ACK, I don't see a reason not to merge this small addition of more clocks, especially that it fixes a real bug. Please feel free to add: Reviewed-by: Sylwester Nawrocki -- Regards, Sylwester