From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753523AbbCSPmo (ORCPT ); Thu, 19 Mar 2015 11:42:44 -0400 Received: from avon.wwwdotorg.org ([70.85.31.133]:44981 "EHLO avon.wwwdotorg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753316AbbCSPmk (ORCPT ); Thu, 19 Mar 2015 11:42:40 -0400 Message-ID: <550AEE6B.5080301@wwwdotorg.org> Date: Thu, 19 Mar 2015 09:42:35 -0600 From: Stephen Warren User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 MIME-Version: 1.0 To: Paul Walmsley CC: Russell King - ARM Linux , linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mark Rutland , Alexandre Courbot , Pawel Moll , Ian Campbell , linux-kernel@vger.kernel.org, Eduardo Valentin , devicetree@vger.kernel.org, Rob Herring , Thierry Reding , Paul Walmsley , Kumar Gala , Hiroshi DOYU Subject: Re: [PATCHv2 3/3] Documentation: DT bindings: Tegra AHB: note base address change References: <20150317083221.32662.14647.stgit@baseline> <20150317083221.32662.96822.stgit@baseline> <20150317103806.GU8656@n2100.arm.linux.org.uk> In-Reply-To: Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/19/2015 09:26 AM, Paul Walmsley wrote: > On Tue, 17 Mar 2015, Russell King - ARM Linux wrote: > >> On Tue, Mar 17, 2015 at 01:32:21AM -0700, Paul Walmsley wrote: >>> Required properties: >>> - compatible : For Tegra20, must contain "nvidia,tegra20-ahb". For >>> - Tegra30, must contain "nvidia,tegra30-ahb". Otherwise, must contain >>> - '"nvidia,-ahb", "nvidia,tegra30-ahb"' where is tegra124, >>> - tegra132, or tegra210. >>> -- reg : Should contain 1 register ranges(address and length) >>> + Tegra30, must contain "nvidia,tegra30-ahb". For Tegra114 and Tegra124, must >>> + contain '"nvidia,-ahb", "nvidia,tegra30-ahb"' where is tegra114 >>> + or tegra124. For Tegra132, the compatible string must contain >>> + "nvidia,tegra132-ahb". >>> + >>> +- reg : Should contain 1 register ranges(address and length). On Tegra20, >>> + Tegra30, Tegra114, and Tegra124 chips, the low byte of the physical base >>> + address of the IP block must end in 0x04. On DT files for later chips, the >>> + actual hardware base address of the IP block should be used. >> >> You could check that in the driver. If you can check it in the driver, >> you can also decide to ignore it if it were offset by 0x04 (possibly >> printing a warning.) That opens up the ability to fix the older Tegra >> DT files going forward while still remaining compatible with existing >> DT files, and avoiding the need for a complex note about this. > > That's fine, I'll do that and drop this patch. Don't we still want to update the DT binding documentation to state what the preferred base address (or at least set of legal base addresses) is/are?