From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752390AbbCWKu4 (ORCPT ); Mon, 23 Mar 2015 06:50:56 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:47731 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752130AbbCWKuy (ORCPT ); Mon, 23 Mar 2015 06:50:54 -0400 Message-ID: <550FF006.6090600@codeaurora.org> Date: Mon, 23 Mar 2015 16:20:46 +0530 From: Archit Taneja User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 MIME-Version: 1.0 To: Stephane Viau , dri-devel@lists.freedesktop.org CC: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robdclark@gmail.com Subject: Re: [PATCH v3 3/4] drm/msm/mdp5: Add START signal to kick off certain pipelines References: <1426276174-17010-1-git-send-email-sviau@codeaurora.org> <1426276174-17010-4-git-send-email-sviau@codeaurora.org> In-Reply-To: <1426276174-17010-4-git-send-email-sviau@codeaurora.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Stephane, On 03/14/2015 01:19 AM, Stephane Viau wrote: > Some interfaces (WB, DSI Command Mode) need to be kicked off > through a START Signal. This signal needs to be sent at the right > time and requests in some cases to keep track of the pipeline > status (eg: whether pipeline registers are flushed AND output WB > buffers are ready, in case of WB interface). > > Signed-off-by: Stephane Viau > --- > drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 2 + > drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 7 +- > drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c | 31 ++-- > drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c | 247 ++++++++++++++++++++++++---- > drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.h | 72 +++----- > drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c | 13 +- > drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h | 1 + > 7 files changed, 276 insertions(+), 97 deletions(-) > > diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c > index c078f30..72c075a 100644 > --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c > +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c > @@ -31,6 +31,7 @@ const struct mdp5_cfg_hw msm8x74_config = { > .ctl = { > .count = 5, > .base = { 0x00600, 0x00700, 0x00800, 0x00900, 0x00a00 }, > + .flush_hw_mask = 0x0003ffff, > }, > .pipe_vig = { > .count = 3, > @@ -78,6 +79,7 @@ const struct mdp5_cfg_hw apq8084_config = { > .ctl = { > .count = 5, > .base = { 0x00600, 0x00700, 0x00800, 0x00900, 0x00a00 }, > + .flush_hw_mask = 0x003fffff, msm8x16 would require a flush_hw_mask too, it should be 0x32a59 if I'm not wrong. Could you please add it for the next revision, or as a part of the 8x16 hw cfg patch? Thanks, Archit -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project