From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752990AbbC0OgR (ORCPT ); Fri, 27 Mar 2015 10:36:17 -0400 Received: from mailout2.w1.samsung.com ([210.118.77.12]:31350 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751802AbbC0OgO (ORCPT ); Fri, 27 Mar 2015 10:36:14 -0400 X-AuditID: cbfec7f4-b7f126d000001e9a-ac-55156a327dce Message-id: <55156AD0.5070107@samsung.com> Date: Fri, 27 Mar 2015 15:36:00 +0100 From: Sylwester Nawrocki User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.1.2 MIME-version: 1.0 To: Javier Martinez Canillas Cc: Kukjin Kim , Doug Anderson , Olof Johansson , Krzysztof Kozlowski , Abhilash Kesavan , Kevin Hilman , Tyler Baker , Steve Capper , Amit Kucheria , linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [RFC PATCH 2/2] ARM: EXYNOS: Make sure that the Exynos5420 MDMA0 clock is enabled during suspend References: <1427466097-7287-1-git-send-email-javier.martinez@collabora.co.uk> <1427466097-7287-3-git-send-email-javier.martinez@collabora.co.uk> In-reply-to: <1427466097-7287-3-git-send-email-javier.martinez@collabora.co.uk> Content-type: text/plain; charset=windows-1252 Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMLMWRmVeSWpSXmKPExsVy+t/xy7pGWaKhBgs+6lo0Nyxmsji77CCb xdHfBRavXxharPmrZNH/+DWzxdfDKxgtLu+aw2Yx4/w+JotT1z+zWayYt4zN4uOOeywOPB6z Gy6yePx9fp3FY+esu+wem1Z1snncubaHzePKiSZWj74tqxg9Pm+SC+CI4rJJSc3JLEst0rdL 4Mq41v+DvaBLpGLRsdvsDYwTBboYOTkkBEwkzr6fxAJhi0lcuLeerYuRi0NIYCmjxI/lr5gg nE+MEs3TV4FV8QpoSezueAtmswioSrz+uZoNxGYTMJToPdrHCGKLCkRInLy7hx2iXlDix+R7 YPUiAnYSN1Y/ZAYZyiywkVmiY+ETJpCEsEC+xM6VHYwQ2yYzSuzaNglsEqeAv8SsJ7+AOjiA OvQk7l/UAgkzC8hLbF7zlnkCo8AsJDtmIVTNQlK1gJF5FaNoamlyQXFSeq6hXnFibnFpXrpe cn7uJkZIxHzZwbj4mNUhRgEORiUeXoODwqFCrIllxZW5hxglOJiVRHi3Z4qGCvGmJFZWpRbl xxeV5qQWH2Jk4uCUamBcz9/VdJfhWwfjn4VvDL+pr2LcHrn1x3mLbzkJ9jai1pP/zmYSCJPa nN+oNbG/fvfXB2YLir7ZyAk9E2h8qr769lddjz3b7pzyPPZ5/bT+/81hZpp35l95rXYp0lov ++/LxAodnd2ZZhOVFtdt/f3TSoSfL9Y1X+2GsYLFyTe87UunPPicYXtHiaU4I9FQi7moOBEA 9wBLdXYCAAA= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Javier, On 27/03/15 15:21, Javier Martinez Canillas wrote: > Commit ae43b3289186 ("ARM: 8202/1: dmaengine: pl330: Add runtime Power > Management support v12") added pm support for the pl330 dma driver but > it makes the clock for the Exynos5420 MDMA0 DMA controller to be gated > during suspend and this clock needs to remain enabled in order to make > the system resume from a system suspend state. > > To make sure that the clock is enabled during suspend, enable it prior > to entering a suspend state and disable it once the system has resumed. > > Thanks to Abhilash Kesavan for figuring out that this was the issue. > > Fixes: ae43b32 ("ARM: 8202/1: dmaengine: pl330: Add runtime Power Management support v12") > Signed-off-by: Javier Martinez Canillas > --- > arch/arm/mach-exynos/suspend.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c > index 1521eaf99265..6dbc0a6d1bb5 100644 > --- a/arch/arm/mach-exynos/suspend.c > +++ b/arch/arm/mach-exynos/suspend.c > @@ -16,6 +16,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -79,6 +80,7 @@ static const struct exynos_pm_data *pm_data; > > static int exynos5420_cpu_state; > static unsigned int exynos_pmu_spare3; > +static struct clk *clk; > > /* > * GIC wake-up support > @@ -374,6 +376,16 @@ static void exynos5420_pm_prepare(void) > { > unsigned int tmp; > > + /* > + * Exynos5420 requires the MDMA0 controller clock to be > + * ungated on suspend in order to be resumed correctly. > + */ > + clk = clk_get(NULL, "mdma0"); > + if (IS_ERR(clk)) > + pr_warn("Failed to get mdma0 clk (%ld)\n", PTR_ERR(clk)); I suppose you want this clk_get() call in exynos_pm_init(), now there is clk_put() missing and this will cause a memory leak. > + else > + clk_prepare_enable(clk); > + > /* Set wake-up mask registers */ > exynos_pm_set_wakeup_mask(); > > @@ -516,6 +528,9 @@ static void exynos5420_pm_resume(void) > { > unsigned long tmp; > > + if (!IS_ERR_OR_NULL(clk)) This should be just IS_ERR(). > + clk_disable_unprepare(clk); > + > /* Restore the CPU0 low power state register */ > tmp = pmu_raw_readl(EXYNOS5_ARM_CORE0_SYS_PWR_REG); > pmu_raw_writel(tmp | S5P_CORE_LOCAL_PWR_EN, -- Regards, Sylwester