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Date: Fri, 27 Mar 2015 16:11:49 +0100
From: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
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To: Sylwester Nawrocki <s.nawrocki@samsung.com>
CC: Kukjin Kim <kgene@kernel.org>, Doug Anderson <dianders@chromium.org>,
        Olof Johansson <olof@lixom.net>,
        Krzysztof Kozlowski <k.kozlowski@samsung.com>,
        Abhilash Kesavan <kesavan.abhilash@gmail.com>,
        Kevin Hilman <khilman@linaro.org>,
        Tyler Baker <tyler.baker@linaro.org>,
        Steve Capper <steve.capper@linaro.org>,
        Amit Kucheria <amit.kucheria@linaro.org>,
        linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH 2/2] ARM: EXYNOS: Make sure that the Exynos5420 MDMA0
 clock is enabled during suspend
References: <1427466097-7287-1-git-send-email-javier.martinez@collabora.co.uk> <1427466097-7287-3-git-send-email-javier.martinez@collabora.co.uk> <55156AD0.5070107@samsung.com>
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Hello Sylwester,

Thanks a lot for your feedback.

On 03/27/2015 03:36 PM, Sylwester Nawrocki wrote:
>>   * GIC wake-up support
>> @@ -374,6 +376,16 @@ static void exynos5420_pm_prepare(void)
>>  {
>>  	unsigned int tmp;
>>  
>> +	/*
>> +	 * Exynos5420 requires the MDMA0 controller clock to be
>> +	 * ungated on suspend in order to be resumed correctly.
>> +	 */
>> +	clk = clk_get(NULL, "mdma0");
>> +	if (IS_ERR(clk))
>> +		pr_warn("Failed to get mdma0 clk (%ld)\n", PTR_ERR(clk));
> 
> I suppose you want this clk_get() call in exynos_pm_init(), now there

Well I wanted to do it in an exynos5420 specific function to avoid
having an of_machine_is_compatible("samsung,exynos5420") but I can
move there if that is preferred.

> is clk_put() missing and this will cause a memory leak.
>

duh, I wonder how I missed that. Thanks for pointing it out.

>> +	else
>> +		clk_prepare_enable(clk);
>> +
>>  	/* Set wake-up mask registers */
>>  	exynos_pm_set_wakeup_mask();
>>  
>> @@ -516,6 +528,9 @@ static void exynos5420_pm_resume(void)
>>  {
>>  	unsigned long tmp;
>>  
>> +	if (!IS_ERR_OR_NULL(clk))
> 
> This should be just IS_ERR().
>

Ok.

>> +		clk_disable_unprepare(clk);
>> +
>>  	/* Restore the CPU0 low power state register */
>>  	tmp = pmu_raw_readl(EXYNOS5_ARM_CORE0_SYS_PWR_REG);
>>  	pmu_raw_writel(tmp | S5P_CORE_LOCAL_PWR_EN,
> 
> --
> Regards,
> Sylwester
> 

Best regards,
Javier