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From: Arnd Bergmann <arnd@arndb.de>
To: Grant Likely <grant.likely@linaro.org>
Cc: Kumar Gala <galak@codeaurora.org>,
	Liviu Dudau <Liviu.Dudau@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robherring2@gmail.com>,
	Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	linux-arm-msm <linux-arm-msm@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	Kishon Vijay Abraham I <kishon@ti.com>
Subject: Re: [PATCH 1/2] pci: Add IORESOURCE_BIT entry for PCIe ECAM resources.
Date: Tue, 03 Jun 2014 11:21:10 +0200	[thread overview]
Message-ID: <5535126.fgWbMeOQVO@wuerfel> (raw)
In-Reply-To: <20140603084459.EC01BC4096E@trevor.secretlab.ca>

On Tuesday 03 June 2014 09:44:59 Grant Likely wrote:
> > The reason I think allow an ECAM makes sense in ranges is because it allows for a direct IO read/write to CFG space (w/o any mapping) similar to what one would do for MEM space or IO.
> 
> I don't think that's right. PCI addresses are defined as follows:
> phys.hi cell: npt000ss bbbbbbbb dddddfff rrrrrrrr
> phys.mid cell: hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh
> phys.low cell: llllllll llllllll llllllll llllllll
> 
> where 'ddddd' is the device number (0-31) and 'fff' is the function number (0-7)
> 
> Going up by one device number or even function number does not result in
> contiguious address values:
> 
> device 0: 0x00000000 00000000 00000000
> device 1: 0x00000800 00000000 00000000
> device 2: 0x00001000 00000000 00000000
> device 3: 0x00001800 00000000 00000000
> ...
> device 30:0x0000f000 00000000 00000000
> device 31:0x0000f800 00000000 00000000
> 
> a simple ranges doesn't work transparently because each of those config
> ranges needs to be mapped to a 4k block. I think ranges would need to
> look like this:
> 
> ranges = <0x00000000 0 0  0x0ff00000  0x1000>,
>          <0x00000800 0 0  0x0ff01000  0x1000>,
>          <0x00001800 0 0  0x0ff02000  0x1000>,
>          ...
>          <0x0000f000 0 0  0x0ff1e000  0x1000>,
>          <0x0000f800 0 0  0x0ff1f000  0x1000>;
> 
> (I just hacked the above up; I make no claims to it's accuracy for
> actual address values)
> 
> But I don't even thing the semantics work there because the address is
> encoded in the phys.hi cell, not the phys.low cell. Incrementing by one
> does not behaves as most bus addresses work. To actually work properly
> we would have needed a way to define a stride of 64bits when
> incrementing config space addresses in a ranges mapping.

Thanks for clearing that up. I always suspected it was roughly this
way, but never managed to think it through completely before getting
distracted by something else.

I wonder if the OF definition matches CAM though, if not ECAM, as
CAM is also limited to 256 byte config space per function.

	Arnd

  reply	other threads:[~2014-06-03  9:21 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-29 16:03 [PATCH] of: treat PCI config space as IORESOURCE_MEM type Kumar Gala
2014-05-29 20:44 ` Rob Herring
2014-05-29 20:51   ` Kumar Gala
2014-05-29 21:50     ` Rob Herring
2014-05-30  0:56     ` Liviu Dudau
2014-05-30  1:29       ` Bjorn Helgaas
2014-05-30  1:41         ` Liviu Dudau
2014-05-30 20:37           ` Jason Gunthorpe
2014-05-30 20:44             ` Kumar Gala
2014-05-30 20:45           ` Kumar Gala
2014-05-30 23:11             ` Liviu Dudau
2014-05-30 23:16               ` Bjorn Helgaas
2014-05-30 23:30                 ` Liviu Dudau
2014-05-31  0:36                   ` Liviu Dudau
2014-05-31  0:36                     ` [PATCH 1/2] pci: Add IORESOURCE_BIT entry for PCIe ECAM resources Liviu Dudau
2014-05-31 18:41                       ` Arnd Bergmann
2014-06-01 11:26                         ` Liviu Dudau
2014-06-02 15:09                         ` Grant Likely
2014-06-02 15:40                           ` Kumar Gala
2014-06-02 16:23                             ` Grant Likely
2014-06-02 18:09                               ` Kumar Gala
2014-06-02 19:15                                 ` Arnd Bergmann
2014-06-02 20:43                                   ` Kumar Gala
2014-06-02 20:44                                     ` Arnd Bergmann
2014-06-03  8:44                                 ` Grant Likely
2014-06-03  9:21                                   ` Arnd Bergmann [this message]
2014-06-03 11:38                                     ` Grant Likely
2014-05-31  0:36                     ` [PATCH 2/2] of: treat PCI config space as IORESOURCE_MEM type with special flags Liviu Dudau

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