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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a21c099sm421786166b.108.2025.08.02.05.04.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 02 Aug 2025 05:04:26 -0700 (PDT) Message-ID: <55420d89-fcd4-4cb5-a918-d8bbe2a03d19@oss.qualcomm.com> Date: Sat, 2 Aug 2025 14:04:20 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 14/15] arm64: dts: qcom: Add initial Milos dtsi To: Luca Weiss , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J. Wysocki" , Viresh Kumar , Manivannan Sadhasivam , Herbert Xu , "David S. Miller" , Vinod Koul , Bjorn Andersson , Konrad Dybcio , Robert Marko , Das Srinagesh , Thomas Gleixner , Jassi Brar , Amit Kucheria , Thara Gopinath , Daniel Lezcano , Zhang Rui , Lukasz Luba , Ulf Hansson Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, dmaengine@vger.kernel.org, linux-mmc@vger.kernel.org References: <20250713-sm7635-fp6-initial-v2-0-e8f9a789505b@fairphone.com> <20250713-sm7635-fp6-initial-v2-14-e8f9a789505b@fairphone.com> <3e0299ad-766a-4876-912e-438fe2cc856d@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=JOM7s9Kb c=1 sm=1 tr=0 ts=688dfecd cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=6H0WHjuAAAAA:8 a=GauJToF0qxMHlBv3vicA:9 a=QEXdDO2ut3YA:10 a=1HOtulTD9v-eNWfpl4qZ:22 a=Soq9LBFxuPC4vsCAQt-j:22 X-Proofpoint-GUID: HnNI_rJ81HkLUNTKrvFp7l5IcOOM7hf5 X-Proofpoint-ORIG-GUID: HnNI_rJ81HkLUNTKrvFp7l5IcOOM7hf5 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODAyMDEwMiBTYWx0ZWRfX0aT39uQkgor9 mQ1hehhU+2sVj6zXWnZod1IITxgTTGkHvntsK0x+/2305+funJfE06+7IimRQyBWN3Dyytf4yID ChNByTN0M9zmBo2mHYemg1jbA3U1AKR5hW+VR39D64d+oTRcrkx2ccyIMYCsUh0GcIQGryqTdpf DLfeymd8cXyS88jhhDMqT3ZUm6rzq79S0c7SJsUbgZ1T/DRIfgdXATiXIjCYStvdVZ4ct0g/4or lYAwSZzZHGCo9qsi6PYsz8Rq8SCcbxpRk6fnwaZGPHd/wa3mQjxoJxYlo7GcqXxsl8ITj7V8rV1 gvY68sVU6FjIPUB3C2HgjUkp74LtHzfavoYDL3cKJgzwjy4H/sd5XjZCW/Iqqu8SZ74+rk5OLOW GSP8SLdyavQqWdlKY8q8nLJdZdfpYK5AXGCcGLkxgkiCoGmKJTjWYYhAnlviv24BBG0Hl7DY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-01_08,2025-08-01_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 suspectscore=0 mlxlogscore=999 spamscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 lowpriorityscore=0 mlxscore=0 impostorscore=0 bulkscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2508020102 On 7/29/25 8:49 AM, Luca Weiss wrote: > Hi Konrad, > > On Thu Jul 17, 2025 at 11:46 AM CEST, Luca Weiss wrote: >> Hi Konrad, >> >> On Thu Jul 17, 2025 at 10:29 AM CEST, Luca Weiss wrote: >>> On Mon Jul 14, 2025 at 1:06 PM CEST, Konrad Dybcio wrote: >>>> On 7/13/25 10:05 AM, Luca Weiss wrote: >>>>> Add a devicetree description for the Milos SoC, which is for example >>>>> Snapdragon 7s Gen 3 (SM7635). >>>>> >>>>> Signed-off-by: Luca Weiss >>>>> --- >>>> >>>> [...] >>>>> + >>>>> + spmi_bus: spmi@c400000 { >>>>> + compatible = "qcom,spmi-pmic-arb"; >>>> >>>> There's two bus instances on this platform, check out the x1e binding >>> >>> Will do >> >> One problem: If we make the labels spmi_bus0 and spmi_bus1 then we can't >> reuse the existing PMIC dtsi files since they all reference &spmi_bus. >> >> On FP6 everything's connected to PMIC_SPMI0_*, and PMIC_SPMI1_* is not >> connected to anything so just adding the label spmi_bus on spmi_bus0 >> would be fine. >> >> Can I add this to the device dts? Not going to be pretty though... >> >> diff --git a/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts b/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts >> index d12eaa585b31..69605c9ed344 100644 >> --- a/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts >> +++ b/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts >> @@ -11,6 +11,9 @@ >> #include >> #include >> #include "milos.dtsi" >> + >> +spmi_bus: &spmi_bus0 {}; >> + >> #include "pm7550.dtsi" >> #include "pm8550vs.dtsi" >> #include "pmiv0104.dtsi" /* PMIV0108 */ >> >> Or I can add a second label for the spmi_bus0 as 'spmi_bus'. Not sure >> other designs than SM7635 recommend using spmi_bus1 for some stuff. >> >> But I guess longer term we'd need to figure out a solution to this, how >> to place a PMIC on a given SPMI bus, if reference designs start to >> recommend putting different PMIC on the separate busses. > > Any feedback on this regarding the spmi_bus label? I had an offline chat with Bjorn and we only came up with janky solutions :) What you propose works well if the PMICs are all on bus0, which is not the case for the newest platforms. If some instances are on bus0 and others are on bus1, things get ugly really quick and we're going to drown in #ifdefs. An alternative that I've seen downstream is to define PMIC nodes in the root of a dtsi file (not in the root of DT, i.e. NOT under / { }) and do the following: &spmi_busN { #include "pmABCDX.dtsi" }; Which is "okay", but has the visible downside of having to define the temp alarm thermal zone in each board's DT separately (and doing mid-file includes which is.. fine I guess, but also something we avoided upstream for the longest time) Both are less than ideal when it comes to altering the SID under "interrupts", fixing that would help immensely. We were hoping to leverage something like Johan's work on drivers/mfd/qcom-pm8008.c, but that seems like a longer term project. Please voice your opinions Konrad