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From: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: <tglx@linutronix.de>, <mingo@redhat.com>, <hpa@zytor.com>,
	<tony.luck@intel.com>, <jiang.liu@linux.intel.com>,
	<yinghai@kernel.org>, <x86@kernel.org>, <dvlasenk@redhat.com>,
	<JBeulich@suse.com>, <slaoub@gmail.com>, <luto@amacapital.net>,
	<dave.hansen@linux.intel.com>, <oleg@redhat.com>,
	<rostedt@goodmis.org>, <rusty@rustcorp.com.au>,
	<prarit@redhat.com>, <linux@rasmusvillemoes.dk>,
	<jroedel@suse.de>, <andriy.shevchenko@linux.intel.com>,
	<macro@linux-mips.org>, <wangnan0@huawei.com>,
	<linux-kernel@vger.kernel.org>, <linux-edac@vger.kernel.org>,
	Robert Richter <rric@kernel.org>
Subject: Re: [PATCH 2/4] x86/mce/amd: Introduce deferred error interrupt handler
Date: Mon, 4 May 2015 14:06:43 -0500	[thread overview]
Message-ID: <5547C343.2020507@amd.com> (raw)
In-Reply-To: <20150504184643.GH3829@pd.tnic>

On 5/4/2015 1:46 PM, Borislav Petkov wrote:
>> For deferred errors, the workaround is a little different as it
>> applies to only the given family/model right now. If the workaround
>> needs to be applied for future processors, we can extend the family
>> check for those right?
> Or, you can do the check for all families as we're behind a CPUID bit
> anyway. This is why CPUID bits are a good thing :-)

Yep. Ok, Will do that.

>> If we setup 'm.addr' in amd_threshold_interrupt() and
>> amd_deferred_error_interrupt() properly, then amd_decode_mce() would
>> actually have some value in m->addr to report.
>>
>> I didn't mean to say HW doesn't provide us the information in the addr
>> and/or the misc registers.
> So you can use mce_read_aux(), yeah, you can move it to mce-internal.h


Ok, will do.
Is it ok to grow another patch in a V2 for this instead of fixing it in 
this patch since it's a real bug?
That should be helpful when someone wants to look up git logs of why 
this was done..

>> The addr, misc registers are still valid for threshold, deferred errors.
>> (Of course, misc is valid only if m->status & MCI_STATUS_MISCV)
>>
>> My point was, in __log_error(), we can read relevant status and addr MSRs to
>> be passed to mce_log() as those are the only pieces of information we use in
>> the decoding chain; and discard the m.misc assignment we do for threshold
>> errors.
> But MCx_MISC is important for thresholding errors, it carries the ErrCnt
> and stuff.
>
> So you can pass a parameter to __log_error(..., threshold=true, misc)
> and do
>
> 	if (threshold)
> 		m.misc = misc;
>
> Right?
>

Yeah, just wanted to keep __log_error() as generic as possible and not 
special case for threshold.
But ok, since MCx_MISC is needed, I'll work it up as you suggested.

Thanks,
-Aravind.

  reply	other threads:[~2015-05-04 19:07 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-30 14:49 [PATCH 0/4] Enable deferred error interrupts Aravind Gopalakrishnan
2015-04-30 14:49 ` [PATCH 1/4] x86/mce: Define 'SUCCOR' cpuid bit Aravind Gopalakrishnan
2015-05-01 10:25   ` Borislav Petkov
2015-05-01 14:54     ` Aravind Gopalakrishnan
2015-05-03  9:01       ` Borislav Petkov
2015-05-01 15:09   ` Dave Hansen
2015-05-01 16:20     ` Borislav Petkov
2015-04-30 14:49 ` [PATCH 2/4] x86/mce/amd: Introduce deferred error interrupt handler Aravind Gopalakrishnan
2015-04-30 20:41   ` Andy Lutomirski
2015-05-01  4:16     ` Aravind Gopalakrishnan
2015-05-01  9:36       ` Borislav Petkov
2015-05-01 14:50         ` Aravind Gopalakrishnan
2015-05-03  9:22   ` Borislav Petkov
2015-05-04 15:29     ` Aravind Gopalakrishnan
2015-05-04 15:46       ` Borislav Petkov
2015-05-04 17:08         ` Aravind Gopalakrishnan
2015-05-04 18:46           ` Borislav Petkov
2015-05-04 19:06             ` Aravind Gopalakrishnan [this message]
2015-05-04 19:14               ` Borislav Petkov
2015-05-05 18:39             ` Aravind Gopalakrishnan
2015-05-05 20:28               ` Luck, Tony
2015-05-05 20:33                 ` Aravind Gopalakrishnan
2015-04-30 14:49 ` [PATCH 3/4] x86, irq: Cleanup ordering of vector numbers Aravind Gopalakrishnan
2015-04-30 14:49 ` [PATCH 4/4] x86/mce/amd: Rename setup_APIC_mce Aravind Gopalakrishnan
2015-05-01  7:18 ` [PATCH 0/4] Enable deferred error interrupts Ingo Molnar
2015-05-01 14:50   ` Aravind Gopalakrishnan

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