From: Clemens Ladisch <clemens@ladisch.de>
To: Johannes Thoma <johannes@johannesthoma.com>,
linux-kernel@vger.kernel.org
Subject: Re: Question about cacheline aligned memory for DMA transfers
Date: Thu, 07 May 2015 09:09:22 +0200 [thread overview]
Message-ID: <554B0FA2.8000503@ladisch.de> (raw)
In-Reply-To: <530602563.487644.1430912396946.JavaMail.open-xchange@oxbaltgw03.schlund.de>
Johannes Thoma wrote:
> Does kmalloc return only memory that is cache line aligned?
Yes.
> do all architectures handle cache line misalign ed dma accesses
> correctly?
x86 does. Most other architectures do not have DMA-coherent caches.
Regards,
Clemens
prev parent reply other threads:[~2015-05-07 7:16 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-06 11:39 Question about cacheline aligned memory for DMA transfers Johannes Thoma
2015-05-07 7:09 ` Clemens Ladisch [this message]
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