From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753232AbbEGHQZ (ORCPT ); Thu, 7 May 2015 03:16:25 -0400 Received: from smtprelay06.ispgateway.de ([80.67.31.96]:45068 "EHLO smtprelay06.ispgateway.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753214AbbEGHQW (ORCPT ); Thu, 7 May 2015 03:16:22 -0400 X-Greylist: delayed 415 seconds by postgrey-1.27 at vger.kernel.org; Thu, 07 May 2015 03:16:22 EDT Message-ID: <554B0FA2.8000503@ladisch.de> Date: Thu, 07 May 2015 09:09:22 +0200 From: Clemens Ladisch User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-Version: 1.0 To: Johannes Thoma , linux-kernel@vger.kernel.org Subject: Re: Question about cacheline aligned memory for DMA transfers References: <530602563.487644.1430912396946.JavaMail.open-xchange@oxbaltgw03.schlund.de> In-Reply-To: <530602563.487644.1430912396946.JavaMail.open-xchange@oxbaltgw03.schlund.de> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Df-Sender: bGludXgta2VybmVsQGNsLmRvbWFpbmZhY3Rvcnkta3VuZGUuZGU= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Johannes Thoma wrote: > Does kmalloc return only memory that is cache line aligned? Yes. > do all architectures handle cache line misalign ed dma accesses > correctly? x86 does. Most other architectures do not have DMA-coherent caches. Regards, Clemens