From: David Daney <ddaney.cavm@gmail.com>
To: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org,
ralf@linux-mips.org
Subject: Re: [PATCH] MIPS64: 48 bit physaddr support in memory maps
Date: Wed, 13 May 2015 14:47:56 -0700 [thread overview]
Message-ID: <5553C68C.6000000@gmail.com> (raw)
In-Reply-To: <20150513185519.27601.4253.stgit@ubuntu-yegoshin>
On 05/13/2015 11:55 AM, Leonid Yegoshin wrote:
> Originally, it was set to 40bits only but I6400 has 48bits of physaddr.
>
Why not go to the architectural limit of 59 bits?
> Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
> ---
> arch/mips/include/asm/addrspace.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h
> index ba0925c84b75..d54137602ac5 100644
> --- a/arch/mips/include/asm/addrspace.h
> +++ b/arch/mips/include/asm/addrspace.h
> @@ -53,7 +53,7 @@
> */
> #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff)
> #define XPHYSADDR(a) ((_ACAST64_(a)) & \
> - _CONST64_(0x000000ffffffffff))
> + _CONST64_(0x0000ffffffffffff))
>
> #ifdef CONFIG_64BIT
>
>
> --
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>
next prev parent reply other threads:[~2015-05-13 21:48 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-13 18:55 [PATCH] MIPS64: 48 bit physaddr support in memory maps Leonid Yegoshin
2015-05-13 21:47 ` David Daney [this message]
2015-05-13 22:58 ` Leonid Yegoshin
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