Is there anyway to do direct mapped cache on Intel hardware?

[Richard Yao <ryao@gentoo.org>]

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Is there anyway to do direct mapped cache on Intel hardware?

Direct mapped cache should allow me to implement software ECC via the
low memory / high memory split. It would be slow, but I would prefer to
have a slow laptop than one that is vulnerable to bit flips.

If direct mapped cache is possible and non-NUMA systems could avoid
writing it back/through, I imagine that people could also protect
against cold boot attacks by encrypting main memory. This would be also
be slow, but the AES instructions that Intel's newer processors are
supposed to have should keep the slowdown within some reasonable bound.

There might also be applications for using external memory algorithms
(e.g. fractal tree indexes) to speed up in-memory operations. I also am
not sure if the difference between system memory and cache is big enough
to make it a win, but I am sure that is not something that I would want
to implement on my laptop in my spare time.

If someone knows a way to do direct mapped cache, please share.


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