From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932423AbbERSdh (ORCPT ); Mon, 18 May 2015 14:33:37 -0400 Received: from smtp.gentoo.org ([140.211.166.183]:36653 "EHLO smtp.gentoo.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932068AbbERSdf (ORCPT ); Mon, 18 May 2015 14:33:35 -0400 Message-ID: <555A307B.1030300@gentoo.org> Date: Mon, 18 May 2015 14:33:31 -0400 From: Richard Yao User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-Version: 1.0 To: Kernel development list Subject: Re: Is there anyway to do direct mapped cache on Intel hardware? References: <555A2A62.80309@gentoo.org> In-Reply-To: <555A2A62.80309@gentoo.org> Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="BjSeGpJlmMgEnm3REqFDK6OfGF1NxNGBQ" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --BjSeGpJlmMgEnm3REqFDK6OfGF1NxNGBQ Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable It seems that there are ways: "These are officially undocumented modes known as "cache-as-RAM mode" in AMD land an "no-fill mode" in Intel's" https://stackoverflow.com/questions/19591500/how-to-make-sure-a-piece-of-= code-never-leaves-the-cpu-cache-l3/24710093#24710093 Now all I need to do is take time during my weekend to figure out how to do it. My apologies for the noise. On 05/18/2015 02:07 PM, Richard Yao wrote: > Is there anyway to do direct mapped cache on Intel hardware? >=20 > Direct mapped cache should allow me to implement software ECC via the > low memory / high memory split. It would be slow, but I would prefer to= > have a slow laptop than one that is vulnerable to bit flips. >=20 > If direct mapped cache is possible and non-NUMA systems could avoid > writing it back/through, I imagine that people could also protect > against cold boot attacks by encrypting main memory. This would be also= > be slow, but the AES instructions that Intel's newer processors are > supposed to have should keep the slowdown within some reasonable bound.= >=20 > There might also be applications for using external memory algorithms > (e.g. fractal tree indexes) to speed up in-memory operations. I also am= > not sure if the difference between system memory and cache is big enoug= h > to make it a win, but I am sure that is not something that I would want= > to implement on my laptop in my spare time. >=20 > If someone knows a way to do direct mapped cache, please share. >=20 --BjSeGpJlmMgEnm3REqFDK6OfGF1NxNGBQ Content-Type: application/pgp-signature; name="signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAEBAgAGBQJVWjB+AAoJECDuEZm+6Exkzz8P/0q0yL7MJtVZ+fC3PW7/fba/ B+FXzgm6gqXE+Yf3RaDb7tbLXWTagU5Wbu52pK/vfp46+FLwIZ15/aAswdV51PDP Hq0268k8tvciK9MoBkC09IGYPLv3i9YUEcvgkPF/04RP9de02HSzAxj8eALUfhEE kAdgLxXKZWQVlzYV43fhUxb/ble1s3UHPNgceh4ITBhC2eUt3CvJvg6d8r+GllNk 6UAmLOJHzZmJQ9dqEL0IL0EbNqMmqzZzJWST8QEsKNECgSTcy9vBVCaa11pGqhhd MU7fI/f/d4Uh25g2thGnotWRweDTHqKUUCIQi1r0tJx8OKY6m0m1T9+b/uRUd/UV OPxX8lpCdBd2DUxtos0Of35daPZJmltxCucN5fmx/VKePz/PPikJHX98VXKzwK2O +Wa5lSW4z5pbNQj2OtqoQuNHPxpISmdvcxM7I9ZxV2MBUtIzXwV0IRFu63ZabZXD Nb8ziLb9DJl+hJn6/+gXmD8m/nVT174o+/E4r6TGg1qsG6hLeQDq5hBF+75CRE0s 4aJ2CU3Pjbi7PQSv9oJbWcQilWkulMR32kO73oP/9A7/uSLywML46ykc403ZMWht YSb9+F4VhP+PYeRy2dCyFlRsKjX1no0Gv/Kuery9uSQtJDyhWEDO2g22aTpUO0Vj 4vSgm5JqzydQrN7yARux =CfKc -----END PGP SIGNATURE----- --BjSeGpJlmMgEnm3REqFDK6OfGF1NxNGBQ--