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From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Paul Burton <paul.burton@imgtec.com>, linux-mips@linux-mips.org
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>,
	Lars-Peter Clausen <lars@metafoo.de>,
	Mark Rutland <mark.rutland@arm.com>,
	Pawel Moll <pawel.moll@arm.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Rob Herring <robh+dt@kernel.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Brian Norris <computersforpeace@gmail.com>
Subject: Re: [PATCH v5 07/37] MIPS: JZ4740: probe CPU interrupt controller via DT
Date: Sun, 24 May 2015 18:17:13 +0300	[thread overview]
Message-ID: <5561EB79.30209@cogentembedded.com> (raw)
In-Reply-To: <1432480307-23789-8-git-send-email-paul.burton@imgtec.com>

Hello.

On 05/24/2015 06:11 PM, Paul Burton wrote:

> Use the generic irqchip_init function to probe irqchip drivers using DT,
> and add the appropriate node to the JZ4740 devicetree in place of the
> call to mips_cpu_irq_init.
>
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
> Cc: Kumar Gala <galak@codeaurora.org>
> Cc: Lars-Peter Clausen <lars@metafoo.de>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Pawel Moll <pawel.moll@arm.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-mips@linux-mips.org
> ---

> Changes in v5: None
> Changes in v4: None
> Changes in v3:
> - Rebase.

> Changes in v2: None

>   arch/mips/boot/dts/ingenic/jz4740.dtsi | 7 +++++++
>   arch/mips/jz4740/irq.c                 | 4 ++--
>   2 files changed, 9 insertions(+), 2 deletions(-)

> diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi
> index c538691f..2d64765c 100644
> --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
> +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi
> @@ -2,4 +2,11 @@
>   	#address-cells = <1>;
>   	#size-cells = <1>;
>   	compatible = "ingenic,jz4740";
> +
> +	cpuintc: cpuintc@0 {

    The node shoiuld be called "inbterrupt-controller@0".

WBR, Sergei


  reply	other threads:[~2015-05-24 16:17 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-24 15:11 [PATCH v5 00/37] JZ4780 & CI20 support Paul Burton
2015-05-24 15:11 ` [PATCH v5 01/37] devicetree/bindings: add Ingenic Semiconductor vendor prefix Paul Burton
2015-05-24 15:11 ` [PATCH v5 02/37] devicetree/bindings: add Qi Hardware " Paul Burton
2015-05-24 15:11 ` [PATCH v5 03/37] MIPS: JZ4740: introduce CONFIG_MACH_INGENIC Paul Burton
2015-05-24 15:11 ` [PATCH v5 04/37] MIPS: ingenic: add newer vendor IDs Paul Burton
2015-05-24 15:11 ` [PATCH v5 05/37] MIPS: JZ4740: require & include DT Paul Burton
2015-05-24 15:11 ` [PATCH v5 06/37] MIPS: irq_cpu: declare irqchip table entry Paul Burton
2015-05-26 15:38   ` Ralf Baechle
2015-05-24 15:11 ` [PATCH v5 07/37] MIPS: JZ4740: probe CPU interrupt controller via DT Paul Burton
2015-05-24 15:17   ` Sergei Shtylyov [this message]
2015-05-24 22:37     ` [PATCH v6 " Paul Burton
2015-05-24 15:11 ` [PATCH v5 08/37] MIPS: JZ4740: use generic plat_irq_dispatch Paul Burton
2015-05-24 15:11 ` [PATCH v5 09/37] MIPS: JZ4740: move arch_init_irq out of arch/mips/jz4740/irq.c Paul Burton
2015-05-24 15:11 ` [PATCH v5 10/37] devicetree: document Ingenic SoC interrupt controller binding Paul Burton
2015-05-24 15:11 ` [PATCH v5 11/37] MIPS: JZ4740: probe interrupt controller via DT Paul Burton
2015-05-24 15:11 ` [PATCH v5 12/37] MIPS: JZ4740: parse SoC interrupt controller parent IRQ from DT Paul Burton
2015-05-24 15:11 ` [PATCH v5 13/37] MIPS: JZ4740: register an irq_domain for the interrupt controller Paul Burton
2015-05-24 15:11 ` [PATCH v5 14/37] MIPS: JZ4740: drop intc debugfs code Paul Burton
2015-05-24 15:11 ` [PATCH v5 15/37] MIPS: JZ4740: remove jz_intc_base global Paul Burton
2015-05-24 15:11 ` [PATCH v5 16/37] MIPS: JZ4740: support >32 interrupts Paul Burton
2015-05-24 15:11 ` [PATCH v5 17/37] MIPS: JZ4740: define IRQ numbers based on number of intc IRQs Paul Burton
2015-05-24 15:11 ` [PATCH v5 18/37] MIPS: JZ4740: read intc base address from DT Paul Burton
2015-05-24 15:11 ` [PATCH v5 19/37] MIPS: JZ4740: avoid JZ4740-specific naming Paul Burton
2015-05-24 15:11 ` [PATCH v5 20/37] MIPS: JZ4740: support newer SoC interrupt controllers Paul Burton
2015-05-24 15:11 ` [PATCH v5 21/37] irqchip: move Ingenic SoC intc driver to drivers/irqchip Paul Burton
2015-05-24 15:11 ` [PATCH v5 22/37] MIPS: JZ4740: call jz4740_clock_init earlier Paul Burton
2015-05-24 15:11 ` [PATCH v5 23/37] MIPS: JZ4740: replace use of jz4740_clock_bdata Paul Burton
2015-05-24 15:11 ` [PATCH v5 24/37] devicetree: add Ingenic CGU binding documentation Paul Burton
2015-05-24 15:11 ` [PATCH v5 25/37] clk: ingenic: add driver for Ingenic SoC CGU clocks Paul Burton
2015-05-24 15:11 ` [PATCH v5 26/37] MIPS,clk: migrate JZ4740 to common clock framework Paul Burton
2015-05-24 15:11 ` [PATCH v5 27/37] MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cgu Paul Burton
2015-05-24 15:11 ` [PATCH v5 28/37] MIPS, clk: move jz4740 UDC auto suspend functions " Paul Burton
2015-05-24 15:11 ` [PATCH v5 29/37] MIPS, clk: move jz4740 clock suspend, resume " Paul Burton
2015-05-24 15:11 ` [PATCH v5 30/37] clk: ingenic: add JZ4780 CGU support Paul Burton
2015-06-03 23:32   ` Michael Turquette
2015-05-24 15:11 ` [PATCH v5 31/37] MIPS: JZ4740: remove clock.h Paul Burton
2015-05-24 15:11 ` [PATCH v5 32/37] MIPS: JZ4740: only detect RAM size if not specified in DT Paul Burton
2015-05-24 15:11 ` [PATCH v5 33/37] devicetree: document Ingenic SoC UART binding Paul Burton
2015-05-24 15:11 ` [PATCH v5 34/37] serial: 8250_ingenic: support for Ingenic SoC UARTs Paul Burton
2015-05-31 21:49   ` Greg Kroah-Hartman
2015-05-24 15:11 ` [PATCH v5 35/37] MIPS: JZ4740: use Ingenic SoC UART driver Paul Burton
2015-05-24 15:11 ` [PATCH v5 36/37] MIPS: ingenic: initial JZ4780 support Paul Burton
2015-05-25 11:03   ` Hauke Mehrtens
2015-05-26  7:25     ` Paul Burton
2015-05-24 15:11 ` [PATCH v5 37/37] MIPS: ingenic: initial MIPS Creator CI20 support Paul Burton

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