From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753910AbbE0Tsg (ORCPT ); Wed, 27 May 2015 15:48:36 -0400 Received: from mail-bn1on0138.outbound.protection.outlook.com ([157.56.110.138]:3783 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753885AbbE0Ts3 (ORCPT ); Wed, 27 May 2015 15:48:29 -0400 Authentication-Results: spf=none (sender IP is 165.204.84.222) smtp.mailfrom=amd.com; apm.com; dkim=none (message not signed) header.d=none; X-WSS-ID: 0NP0XOF-08-333-02 X-M-MSG: Message-ID: <55661F71.3090100@amd.com> Date: Wed, 27 May 2015 14:48:01 -0500 From: Suravee Suthikulanit User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-Version: 1.0 To: Lorenzo Pieralisi CC: "linux-kernel@vger.kernel.org" , "linux-pci@vger.kernel.org" , Ralf Baechle , "James E.J. Bottomley" , Michael Ellerman , Bjorn Helgaas , Richard Henderson , Benjamin Herrenschmidt , David Howells , Russell King , Tony Luck , "David S. Miller" , Ingo Molnar , Michal Simek , "yasutake.koichi@jp.panasonic.com" , Chris Zankel , "Arnd Bergmann" , Krzysztof Halasa , Phil Edworthy , Jason Gunthorpe , Jingoo Han , "Lucas Stach" , Simon Horman , "Minghuan Lian" , Murali Karicheri , Tanmay Inamdar , Kishon Vijay Abraham I , Thierry Reding , Thomas Petazzoni , Will Deacon , Jayachandran C Subject: Re: [RFC/RFT PATCH] PCI: move pci_read_bridge_bases to the generic PCI layer References: <1432214067-2752-1-git-send-email-lorenzo.pieralisi@arm.com> <5565F40C.8010004@amd.com> <20150527175447.GA7914@red-moon> In-Reply-To: <20150527175447.GA7914@red-moon> Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1;BN1BFFO11FD053;1:GCbEAt8zIYpidxJcaou2qmpMXbVRLxLHulyIkqUS4ciXq+LcKDZCrFdjDhJl13rwyNrtWtiJEpC3VFLDRvy0ZifRlFnGMvZVW00uFl71lj/LLK99ClM4/awx4QmUq+yselq0VZ/AdTmy02J9EikICZCCz9C63gtB/xZRgMsi3a0l0erqUGmoVs8/SJLnATnyjsCFX0g9Np+eRwTsUWyoaLY4Ac0uu0FN3YCiBPcEnJ/vGcCKLsF/vBntVnXbr+YV2Ibtqs0OCOiMhG/wlN73OP40HsM77XQ0CYiyYojHYm8CfGGoPc+EKw47luGCWf99RYOGlk0Xhe8QiC9bvc8B9g== X-Forefront-Antispam-Report: CIP:165.204.84.222;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019020)(979002)(6009001)(428002)(199003)(51704005)(24454002)(189002)(479174004)(377454003)(164054003)(106466001)(120886001)(62966003)(59896002)(80316001)(5001860100001)(64706001)(47776003)(189998001)(46102003)(110136002)(5001830100001)(50466002)(92566002)(77156002)(64126003)(23746002)(87936001)(101416001)(65806001)(86362001)(4001350100001)(50986999)(65956001)(33656002)(65816999)(105586002)(36756003)(2950100001)(99136001)(77096005)(4001540100001)(76176999)(87266999)(68736005)(97736004)(83506001)(54356999)(41533002)(7059030)(969003)(989001)(999001)(1009001)(1019001);DIR:OUT;SFP:1102;SCL:1;SRVR:BLUPR02MB1107;H:atltwp02.amd.com;FPR:;SPF:None;PTR:InfoDomainNonexistent;A:1;MX:1;LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR02MB1107;UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR02MB1667; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5005006)(520003)(3002001);SRVR:BLUPR02MB1107;BCL:0;PCL:0;RULEID:;SRVR:BLUPR02MB1107; X-Forefront-PRVS: 05891FB07F X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 May 2015 19:48:18.2098 (UTC) X-MS-Exchange-CrossTenant-Id: fde4dada-be84-483f-92cc-e026cbee8e96 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fde4dada-be84-483f-92cc-e026cbee8e96;Ip=[165.204.84.222];Helo=[atltwp02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR02MB1107 X-OriginatorOrg: amd.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/27/2015 12:54 PM, Lorenzo Pieralisi wrote: >>> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c >>> > >index 062fee6..335d9f2 100644 >>> > >--- a/drivers/pci/probe.c >>> > >+++ b/drivers/pci/probe.c >>> > >@@ -453,7 +453,11 @@ void pci_read_bridge_bases(struct pci_bus *child) >>> > > struct resource *res; >>> > > int i; >>> > > >>> > >- if (pci_is_root_bus(child)) /* It's a host bus, nothing to read */ >>> > >+ /* >>> > >+ * If it is not a PCI bridge there is nothing to read >>> > >+ */ >>> > >+ if (pci_is_root_bus(child) || !dev || >>> > >+ !((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)) >>> > > return; >>> > > >>> > > dev_info(&dev->dev, "PCI bridge to %pR%s\n", >>> > >@@ -1878,6 +1882,11 @@ unsigned int pci_scan_child_bus(struct pci_bus *bus) >>> > > * all PCI-to-PCI bridges on this bus. >>> > > */ >>> > > if (!bus->is_added) { >>> > >+ /* >>> > >+ * Read and initialize bridge resources. >>> > >+ */ >>> > >+ pci_read_bridge_bases(bus); >>> > >+ >>> > > dev_dbg(&bus->dev, "fixups for bus\n"); >>> > > pcibios_fixup_bus(bus); >>> > > bus->is_added = 1; >>> > > >> > >> >So, I have tested the patch on ARM64 system w/ PROBE_ONLY mode, and >> >noticed that we are calling pci_read_bridge_bases() after adding the >> >devices on the slots. This is not soon enough since the downstream >> >devices still failing to claim resources. >> > >> >However, do you think we can move pci_read_bridge_bases() before the >> >pci_scan_slot() loop? > Right, how about moving it to pci_scan_bridge() before calling the > respective pci_scan_child_bus() ? I think it belongs there anyway. > > Thanks, That seems reasonable. I test putting it here in pci_scan_bridge(), and it works. .... child = pci_find_bus(pci_domain_nr(bus), secondary); if (!child) { child = pci_add_new_bus(bus, dev, secondary); if (!child) goto out; child->primary = primary; pci_bus_insert_busn_res(child, secondary, subordinate); child->bridge_ctl = bctl; pci_read_bridge_bases(child); } cmax = pci_scan_child_bus(child); ..... Thanks, Suravee