From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754854AbbE2BCL (ORCPT ); Thu, 28 May 2015 21:02:11 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:39480 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751556AbbE2BCH (ORCPT ); Thu, 28 May 2015 21:02:07 -0400 Message-ID: <5567B9BE.9000502@huawei.com> Date: Fri, 29 May 2015 08:58:38 +0800 From: Bintian User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:24.0) Gecko/20100101 Thunderbird/24.0.1 MIME-Version: 1.0 To: Kevin Hilman CC: Michael Turquette , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v8 6/7] clk: hi6220: Clock driver support for Hisilicon hi6220 SoC References: <1432440671-25235-1-git-send-email-bintian.wang@huawei.com> <1432440671-25235-3-git-send-email-bintian.wang@huawei.com> <20150528052608.22384.96747@quantum> <5566CF13.8060806@huawei.com> <7h4mmwip62.fsf@deeprootsystems.com> In-Reply-To: <7h4mmwip62.fsf@deeprootsystems.com> Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.111.68.103] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Kevin, On 2015/5/29 1:32, Kevin Hilman wrote: > Bintian writes: > >> Hello Mike, >> >> On 2015/5/28 13:26, Michael Turquette wrote: >>> Quoting Bintian Wang (2015-05-23 21:11:11) >>>> Add clock drivers for hi6220 SoC, this driver controls the SoC >>>> registers to supply different clocks to different IPs in the SoC. >>>> >>>> We add one divider clock for hi6220 because the divider in hi6220 >>>> also has a mask bit but it doesnot obey the rule defined by flag >>>> "CLK_DIVIDER_HIWORD_MASK", we can not get index of the mask bit by >>>> left shift fixed bits (e.g. 16 bits), so we add this divider clock >>>> to handle it. >>>> >>>> Signed-off-by: Jorge Ramirez-Ortiz >>>> Signed-off-by: Bintian Wang >>>> Acked-by: Haojian Zhuang >>>> Reviewed-by: Zhangfei Gao >>>> Tested-by: Will Deacon >>>> Tested-by: Tyler Baker >>> >>> Hi Bintian, >>> >>> Thanks for making the changes requested by Stephen. I've taken his patch >>> to add assigned-clock-rate/parent support for AMBA interconnects and >>> applied it to 4.1-rc1, and then I've applied your v8 patches #4-6 on top >>> of that. You can find it at: >>> >>> git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next-hi6220 >> Thank you very much! >> >> I think you also need to pick patch "[PATCH v5 3/6] clk: hi6220: >> Document devicetree bindings for hi6220 clock", which described the >> dt binding of clk, and it is also acked by Stephen(v4 is the same to >> v5). >> >>> I have merged this into clk-next so it can get some cycles in >>> linux-next. >>> >>> Stephen, >>> >>> Can you send your patch out to Russell properly? It needs his ack (or >>> for him to take it outright) in order to unblock the hi6220 clock driver >>> from being merged. >> It doesn't block hi6220 clock driver now, because the UART1 is not >> enabled in hi6220 dts now. > > Now that the clk changes are queued up, can you (re)post the remaining > hikey patches with a changelog stating the dependency on the clk-next > branch. I believe what's left is just the DT and Kconfig/defconfig > changes, correct? Yes, you are right. I will post the remaining hikey patches soon. Thank you Kevin, BR, Bintian > > With some acks from the DT maintainers, these should be ready to be > merged through arm-soc. > > Thanks, > > Kevin > > . >